E1 slip

korbenda11as · ‎03-04-2008

E1 0/0/0 is up.

Applique type is Channelized E1 - balanced

Description: DOD to International with PRI link

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20071009, FPGA: 20, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (519 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

171 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

171 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 0 Path Code Violations,

28557 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

28557 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

I can see a 171 slips error. is this ok? if not, how to fix this, whats the cause of this? thanks

korbenda11as · ‎03-04-2008

basically, with my E1 module I have two ports connected to different Telco, can this contribute to "slip" error? any suggestions?

paolo bevilacqua · ‎03-04-2008

First of all, you need the network-clock-participate wic 0 and networkc-clock-select commands.

Then check again and let us know.