Hi Giuseppe;

Ok I should be looking at the I/O portion and not the processor of the sh mem correct? Reason why I ask is that I have folks complaining about latency and they are telling me it is a network issue but before I tell them know I just wanted to make sure my router had enough memory to handle what is goiong on.

Hello Warren,

your router has plenty of memory available both main memory and I/O memory.

Latency can be caused by a link full in saturation.

On wan serial interfaces verify with show interface serial if you have output drops these are a sign of a link that experiences congestion from time to time.

You can provide some better treatment for congestion (if not permanent ) by using WRED in a service policy applied outbound the serial interface.

But if the link is almost always congested you need to think of a link upgrade.

If no link is congested the network should be innocent.

Hope to help

Giuseppe

I've check with the carrier and they tell me the line is clean, I checked both sides of the serial interface and the interface is clean no errors. I've also check the ethernet connection and that is clean as well. So everything in the router and carrier checks out before i go argue with the users that it isn't the network just wanted to double check the memory in the router to ensure I had enough to support the traffic.

BTW: Clean lines and clean Ethernet ports, or sufficient router memory, doesn't mean users can't see latency issues.

[edit]

As Giuseppe notes, "Latency can be caused by a link full in saturation", although with QoS not all traffic may see latency. Even when link isn't in full saturation, there can be transient congestion (micro bursts) which can make intermittent latency (and is often difficult to determine looking at routine device stats).

As Giuseppe futher notes, WRED can be a solution for some congestion, but it's a tricky tecnology to derive maximum benefit from. I would first suggest, if using FIFO, to switch to using FQ.

Giuseppe also writes "But if the link is almost always congested you need to think of a link upgrade.", but note the word "almost". Depending on the nature of traffic and QoS support, a congested link doesn't always require a bandwidth upgrade.

oh no I agree with you on that, but the thing is I can ping server to server no latency seen, I can ping router to server no latency seen, I can ping router to router no latency seen. Now when he starts up his application and that is when he sees latency. I believe it is his applications as no one else that routes through that router is complaining. It would be a different story if someone else complains as well but no one else is.

Hi,

I would agree with you to say this is just a single user problem if no one else complains about it. Furthermore, the timing you measure the latency will affect the outcome. Assuming during the start of the application requires more BW which fully utilize the link and caused the saturation and hence experience latency. A good supporting tool will be a graph to show utilization of the link.

It would be rather odd for lack of memory within a router to be a cause of latency; drops perhaps. Too much memory allocated to queues might cause latency.

BTW:

If your IOS is late enough, the command "sh mem st h" will show you graphs of free memory. Good method to see what your router has been doing with its available memory.

From your explanation,are you saying the out put of 'sh ver'= total mem/used by I/O.

1. Now what I need to know is,is total mem - I/O mem = processor mem?

2.Is there a kind of allocation which says mem used by I/O cannot exceed the 40M in the sh ver.

3.Is the memory a module( like that of a PC)? Do we have separate for processor and I/O,or its same module.

Hello Just,

1) yes

2) in modern routers and IOS the size of I/O is adjusted during the boot process there is a message about this during boot. First attempt is made by using 3% of total memory

for example in a c7206 VXR with NPE-G2

Cisco 7206VXR (NPE-G2) processor (revision A) with 917504K/65536K bytes of memory

3) the memory is made of standard chips but with error correction, the chips are used for both types of memory see also point 2

Hope to help

Giuseppe

Thanks very much..