Clocking Issue with 2 E-1's - One interface is up/up other is up/down

Unanswered Question
Jan 28th, 2009
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Here is my config:

card type e1 0 0

card type e1 0 1

card type e1 0 3

!

network-clock-participate wic 0

no network-clock-participate wic 1

network-clock-participate wic 3

network-clock-select 1 E1 0/3/0

!

controller E1 0/0/0

framing NO-CRC4

channel-group 0 timeslots 1-31

!

controller E1 0/1/0

framing NO-CRC4

channel-group 0 timeslots 1-31

!

controller E1 0/3/0

framing NO-CRC4

ds0-group 1 timeslots 1-15,17-20 type r2-digital r2-compelled ani

cas-custom 1

country telmex use-defaults

category 2

answer-signal group-b 1

!

interface Serial0/0/0:0

description Telmex D32-0811-0825

ip address 201.XX.XX.129 255.255.255.252

ip access-group Serial0/0/0:0_in in

ip nbar protocol-discovery

ip flow ingress

load-interval 30

no fair-queue

!

interface Serial0/1/0:0

description Telmex D32-0811-0826

ip address 201.XX.XX.133 255.255.255.252

ip nbar protocol-discovery

ip flow ingress

load-interval 30

no fair-queue

!

ip route 0.0.0.0 0.0.0.0 Serial0/0/0:0

ip route 0.0.0.0 0.0.0.0 Serial0/1/0:0



CSCR001#sh ip int b

Serial0/0/0:0 201.XX.XX.129 YES NVRAM up up

Serial0/1/0:0 201.XX.XX.133 YES NVRAM up down


I am lost at this point and cannot understand why I cannot get this other interface up.


CSCR001#sh controllers e1 0/0/0:0 brief

E1 0/0/0 is up.

Applique type is Channelized E1 - balanced

Cablelength is Unknown

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20071011, FPGA: 13, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.



CSCR001#sh controllers e1 0/1/0:0 brief

E1 0/1/0 is up.

Applique type is Channelized E1 - balanced

Cablelength is Unknown

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20071011, FPGA: 13, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.




CSCR001#sh controllers e1 0/3/0:0 brief

E1 0/3/0 is up.

Applique type is Channelized E1 - balanced

Cablelength is Unknown

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20071011, FPGA: 13, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

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Richard Burts Wed, 01/28/2009 - 12:20
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Rick


The obvious difference between the one that works and the one that does not work is this:

network-clock-participate wic 0

no network-clock-participate wic 1

do you know why network-clock-participate is turned off on wic 1?


HTH


Rick

Rick Morris Wed, 01/28/2009 - 12:23
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I had wondered this too.

We had a lot of slips on the E-1's and the voice trunks. This was something we worked out with TAC and they told us to do this.

I am not 100% sure why but this was something I wondered I should check.

At this time I do not have out-of-band access so I cannot make changes on the fly just yet. I will gain access via out-of-band later this week but wanted to check and see if anyone else had any ideas.


Thanks,


Rick

paolo bevilacqua Wed, 01/28/2009 - 12:42
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Hi,


likely you will find that interface down is due to a problem with the circuit.


network-clock-participate or lack of it will not influence interface status, and since all circuits appears to be coming from a same provider, all clocks are equivalent.


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