I'm in c2800nm-ipvoicek9-mz.124-9.T3.bin

Can you try either 12.4(3j), or if need 12.4T features, 12.4(9)T7.

Also please post show controllers E1.

Please found below the sh controller E1

I have the problem on this to links

E1 0/0/0 is up.

Applique type is Channelized E1 - balanced

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20060623, FPGA: 20, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (494 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 3748 Path Code Violations,

0 Slip Secs, 2 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

0 Errored Secs, 0 Bursty Err Secs, 3 Severely Err Secs, 25 Unavail Secs

E1 0/0/1 is up.

Applique type is Channelized E1 - balanced

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20060623, FPGA: 20, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (501 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 0 Path Code Violations,

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 116 Unavail Secs

E1 0/0/0 had got some errors, are you sure the PBX supplies clock on this circuit ?

Hi

We have expeted some problem yesterday at the same time.

In the new « sh controller E1 », there is no new error.

ISRROTONDE1#sh controller E1

E1 0/0/0 is up.

Applique type is Channelized E1 - balanced

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20060623, FPGA: 20, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (405 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 0 Path Code Violations,

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 12 Unavail Secs

E1 0/0/1 is up.

Applique type is Channelized E1 - balanced

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20060623, FPGA: 20, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (409 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 0 Path Code Violations,

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 60 Unavail Secs

ISRROTONDE1#

Some errors you still have:

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 12 Unavail Secs

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 60 Unavail Secs