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bps(conform rate) in rate-limit is not in exact increments of 8 kbps

tj_chacko
Level 1
Level 1

Hi all,

I have 1 questions regarding the rate-limit.

According to the cisco documentation, the rate limit command will have the following parameters:-

bps - Average rate, in bits per second (bps). The value must be in increments of 8 kbps. The value is a number from 8000 to 2000000000.

When I execute this command on a interface GigabitEthernet8/1/0.100 of a SPA card,

rate-limit input access-group 114 8000 20000 40000 conform-action transmit exceed-action set-prec-transmit 0

Response:

Adjusting conform rate to match hardware supported rate 64000 bps

Question:

The conform rate is a multiple of 8000. But, when I entered the value 8000 in the command, why is the conform rate getting changed from 8000 to 64000 bps?

Is it because it is a SPA card or Gigabit interface? Is there a way to get this value(64000) from the router using any other command?

Also, there is 6 subinterfaces of GigabitEthernet8/1/0 like GigabitEthernet8/1/0.100, GigabitEthernet8/1/0.200,etc.

Please help.

SPA card Details:-

---------------------

SLOT 8 (RP/LC 8 ): Modular SPA Interface Card (10G)

MAIN: type 117, 800-26102-02 rev A0

Deviation: 0

HW config: 0x01 SW key: 00-00-00

PCA: 73-9863-03 rev A0 ver 8

Design Release 1.0 S/N SAD093605KC

MBUS: Embedded Agent

Test hist: 0x00 RMA#: 00-00-00 RMA hist: 0x00

DIAG: Test count: 0x00000000 Test results: 0x00000000

FRU: Linecard/Module: 12000-SIP-600=

Processor Memory: MEM-LC5-1024=(Non-Replaceable)

Packet Memory: MEM-LC5-PKT-512=(Non-Replaceable)

L3 Engine: 5 - ISE 10 Gbps

MBUS Agent Software version 2.69 (RAM) (ROM version is 2.65)

ROM Monitor version 1.13

Fabric Downloader version used n/a (ROM version is 4.3)

Primary clock is CSC 1

Board is analyzed

Board State is Line Card Enabled (IOS RUN )

Insertion time: 00:00:04 (6d13h ago)

Processor Memory size: 1073741824 bytes

TX Packet Memory size: 268435456 bytes, Packet Memory pagesize: 32768 bytes

RX Packet Memory size: 268435456 bytes, Packet Memory pagesize: 32768 bytes

0 crashes since restart

SPA Information:

subslot 8/0: SPA-1XTENGE-XFP (0x483), status is ok

subslot 8/1: SPA-1X10GE-L-V2 (0x50C), status is ok

SUBSLOT 8/0 (SPA-1XTENGE-XFP): 1-port 10 Gigabit Ethernet Shared Port Adapter XFP based

Product Identifier (PID) : SPA-1XTENGE-XFP

Version Identifier (VID) : V01

PCB Serial Number : JAB094205E7

Top Assy. Part Number : 68-2430-01

Top Assy. Revision : D0

Hardware Revision : 3.2

CLEI Code : IPUIAKBRAA

Insertion Time : 00:00:13 (6d13h ago)

Operational Status : ok

SUBSLOT 8/1 (SPA-1X10GE-L-V2): 1-port 10 Gigabit Ethernet Shared Port Adapter XFP based

Product Identifier (PID) : SPA-1X10GE-L-V2

Version Identifier (VID) : V02

PCB Serial Number : JAE1143124A

Top Assy. Part Number : 68-2614-02

Top Assy. Revision : A0

Hardware Revision : 1.2

CLEI Code : IPUIA5VRAA

Insertion Time : 00:00:14 (6d13h ago)

Operational Status : ok

1 Reply 1

Giuseppe Larosa
Hall of Fame
Hall of Fame

Hello Thilakh,

this kind of limitation is hardware dependent you are using a powerful multilayer switch with a SIP and SPA combination.

a limitation of 64 kbps should be acceptable given the high speed links expected on this platform

http://www.cisco.com/en/US/docs/interfaces_modules/shared_port_adapters/configuration/6500series/76cfgeth.html

Hope to help

Giuseppe

Review Cisco Networking products for a $25 gift card