Nice one (+5), "professor" Giuseppe. 

Great one. Thank you so much!

Really helpful post Guiseppe. Thank you. Been searching the web for a good explanation of mpps figures and that was it.

Of course another question always arises, so I wonder if you or any other forum members can help...

I understand how to make very good use of throughput rates easily enough, but are mpps figures in themselves ever of any use, be it the network designer, network manager or whomever? Or is it just something that Product Marketing teams like the sound of? For example, would a network designer use them when spec'ing switches?

When the forwarding capabilities of a backplane or switching fabric are greater then the sum of speeds of all ports (counted twice one for tx and one rx direction) we call the switching fabric non blocking: traffic between a pair of ports is not influenced by what traffic is exchanged on all other ports.

Hi,

I currently use Cisco stackable switch (3750-X) 48 Gi Port. This device has a blackplane of 32Gpbs. I would have thought the 3750 would not non blocking?

I'm reading this right?

Thanks

Unlike legacy Stackwise, the newer StackWise Plus (used your 3750-X's) enables local switching. Therefore, if the ingress and egress ports are both on the same stack member (i.e. same switch), then the stack ring isn't used at all. Backplane bandwidth for connecting the 48 ports (and network module, if fitted) is sufficient to enable non-blocking.

However, 48 ports x 1Gbps (plus potentially 2 x 10Gbps in network module) definitely doesn't squeeze into 32Gbps stack ring, so the stack ring is contended.

Just bear in mind that if you connect any Stackwise switches, like the older 3750G, then any 3750-Es or 3750-Xs must also flip back to the lesser Stackwise.

Hello John,

we have to refer to specific model datasheet

http://www.cisco.com/en/US/prod/collateral/switches/ps5718/ps6406/data_sheet_c78-584733.html

table 9

Do not confuse the speed of the stackwise ring with the internal switching fabric of each stack member, they are different: the internal switching fabric should be used for traffic between ports on the same stack member device, the stackwise bandwidth should be used when traffic must flow between ports located on different stack members.

Note: this is just my assumption about the implementation of stack, it may be different with the dual ring involved also for traffic between two ports on the same member switch. (total lack of so called local switching capabilities).

The stack implements a dual ring topology between the member switches that act as an extension of the individual switching fabrics.

The speed of the ring for a stack of only 3750-X (stackwise plus) should be 32 Gbps full duplex that allows for a very good interconnection between member switches, but I agree it is not enough to classify the composite switching fabric as not blocking.

On the other hand, only models with 10GE ports can be interconnected at comparable speeds.

To make a comparison a C6500 equipped with Sup720 generation route processor provides up to 40 Gbps per slot to/from the switching fabric and some linecards are faster then that ( think of  WS-6708 or WS-6716 with 8 and 16 tengiga ports respectively).

About the forwarding capacity in pps:

for a 24 ports device is listed as 65.5 Mbps that accounts for 22 GE ports 1Gbps full duplex with 64 byte frames.

Hope to help

Giuseppe

I've never understood how Cisco get to 160Gbps. I know it's a half-duplex figure, so 48 x 1Gbps = 96Gbps at half duplex. Add on a couple of 10Gbps ports in a network module is another 40Gbps at half duplex. That makes 136Gbps. Where's the other 24Gbps come from?

Hello Shillings,

my understanding is that the switching fabric can be seen as a discrete piece of HW so when the platform designers has chosen this macro component for all C3750-X - C3560-X models they have chosen one with enough capacity to accomodate 48 GE ports and 2 10GE ports. (ideally 4 10GE ports if possible)

The HW macro component may be even produced by a third party company and not by Cisco as far as I know.

Hope to help

Giuseppe

Interesting - thanks Giuseppe

Giuseppe Larosa wrote:
Hello John,
we have to refer to specific model datasheet
http://www.cisco.com/en/US/prod/collateral/switches/ps5718/ps6406/data_sheet_c78-584733.html
table 9
Switching Fabric
#
160 Gbps
Do not confuse the speed of the stackwise ring with the internal switching fabric of each stack member, they are different: the internal switching fabric should be used for traffic between ports on the same stack member device, the stackwise bandwidth should be used when traffic must flow between ports located on different stack members.
Note: this is just my assumption about the implementation of stack, it may be different with the dual ring involved also for traffic between two ports on the same member switch. (total lack of so called local switching capabilities).
The stack implements a dual ring topology between the member switches that act as an extension of the individual switching fabrics.
The speed of the ring for a stack of only 3750-X (stackwise plus) should be 32 Gbps full duplex that allows for a very good interconnection between member switches, but I agree it is not enough to classify the composite switching fabric as not blocking.
On the other hand, only models with 10GE ports can be interconnected at comparable speeds.
To make a comparison a C6500 equipped with Sup720 generation route processor provides up to 40 Gbps per slot to/from the switching fabric and some linecards are faster then that ( think of  WS-6708 or WS-6716 with 8 and 16 tengiga ports respectively).
About the forwarding capacity in pps:
for a 24 ports device is listed as 65.5 Mbps that accounts for 22 GE ports 1Gbps full duplex with 64 byte frames.
Hope to help
Giuseppe

Hi Giusepee,

Point taken, when switches are connected into the stacks if all 48 ports communicated with the other members cross ports the stack would not be enough. The speed of 32Gpbs would this be on one stackwise cable or would 2 cables allow 64Gpbs? Also is the internal switching fabric touch when data is passed by different members?

Also how did you calculate the maths behind your latter comment on the Mbps?

I know this thread is based on a switch, but I also have a router question.

Based on this guide http://www.cisco.com/web/partners/downloads/765/tools/quickreference/routerperformance.pdf

It is said that a 881 Model router roughly has a throughput of no more than 25 Mbps. But when conducting a speed test with a high speed Internet link, I'm able to archive 90 Mbps bidirectional?

Thanks

Disclaimer

The  Author of this posting offers the information contained within this  posting without consideration and with the reader's understanding that  there's no implied or expressed suitability or fitness for any purpose.  Information provided is for informational purposes only and should not  be construed as rendering professional advice of any kind. Usage of this  posting's information is solely at reader's own risk.

Liability Disclaimer

In  no event shall Author be liable for any damages whatsoever (including,  without limitation, damages for loss of use, data or profit) arising out  of the use or inability to use the posting's information even if Author  has been advised of the possibility of such damage.

Posting

Point taken, when switches are connected into the stacks if all 48 ports communicated with the other members cross ports the stack would not be enough. The speed of 32Gpbs would this be on one stackwise cable or would 2 cables allow 64Gpbs? Also is the internal switching fabric touch when data is passed by different members?
Also how did you calculate the maths behind your latter comment on the Mbps?
I know this thread is based on a switch, but I also have a router question.
Based on this guide http://www.cisco.com/web/partners/downloads/765/tools/quickreference/routerperformance.pdf
It is said that a 881 Model router roughly has a throughput of no more than 25 Mbps. But when conducting a speed test with a high speed Internet link, I'm able to archive 90 Mbps bidirectional?

An original series 3750 (or 3560) fabric is 32 Gbps.  This is different from the stack ring's "32 Gbps" (which is really dual 8 Gbps, duplex).

An original series 3750 (or 3560) internal fabric, in theory, is oversubscribed by more than 16 gig ports (i.e. the "G" suffixed original models).

The terms non-blocking and blocking, when examining switch fabric isn't just sufficient bandwidth capacity to forward all port bandwidths, it's whether the fabric's architecture will block, or not, forwarding of frames even if there's "sufficient" bandwidth.

For example, you have three ingress ports.  Two are sending to one egress port (2:1) and the other is sending to other egress port (1:1).  If 2:1 congestion on the one egress port delays (or blocks) transmission on the 1:1 egress port, you have HOL (head-of-line) blocking even though the internal fabric's bandwidth could support each ingress port sending to a separate egress port (all 1:1).

StackWise (and StackWise+), when available, use both ring ports.

Original StackWise copies ALL member switch traffic to the stack ring.  Original StackWise source stack member also removes the traffic it placed on the stack ring.

StackWise Plus only places unicast traffic on the stack ring when destination is not a local switch port.  Additionally, destination switch member removes unicast packets.  (I.e. StackWise+ uses it's ring much more intelligently.  It also has dual 16 Gbps stack ring ports.  NB:StackWise+, for the most part, reverts to StackWise operation if there's a StackWise only member switch in the stack [good reason not to use such mixed stacks].)

Bits per second, is the transmission rate supported by the media.  So, for example, 100 Mbps allows transmission of 100,000,000 bits per seconds.  However, transferring actual data, in something like physical segments (e.g. frames) uses some of this capacity for both framing overhead and framing delineation, so useful capacity is less than the often quoted bps rate.  Useful capacity percentage (of overall rate) also generally decreases as frame size decreases.  (BTW, similar issue with disk media.  At least disk capacity isn't, generally, quoted for its unformatted capacity any longer.)

The 25 Mbps throughput is rated for minimum sized packets.  Larger packets often allow much higher throughput as the packets per second requirement (for same bandwidth) decreases.  (Sometimes the vendor will document PPS rates for multiple packet sizes.  Without such documentation, or your own testing, just knowing documented performance for one packet size you cannot accurately predict a device's performance for other packet sizes.)

JosephDoherty wrote:
The terms non-blocking and blocking, when examining switch fabric isn't just sufficient bandwidth capacity to forward all port bandwidths, it's whether the fabric's architecture will block, or not, forwarding of frames even if there's "sufficient" bandwidth.
For example, you have three ingress ports.  Two are sending to one egress port (2:1) and the other is sending to other egress port (1:1).  If 2:1 congestion on the one egress port delays (or blocks) transmission on the 1:1 egress port, you have HOL (head-of-line) blocking even though the internal fabric's bandwidth could support each ingress port sending to a separate egress port (all 1:1).

Hi Joseph,

This is obviously an important point you're making here. Whilst I can tell you've gone to some length to express this clearly, I'm still being a bit dim.

Are you moving into the 3750-X architecture where each of the three ASICs links into three 8-port PHYs and the three PHYs then link into either a 24x1GbE or 2x10GbE controller? Is this the area you are referring to with the term 'Head-of-Line Blocking'? I have not come across this term before.

I can understand 2 x 1Gbps of ingress traffic doesn't fit into a 1Gbps egress port, but it sounds that there is more to it than that from a design point of view and ensuring a 3750-X can meet the specific traffic patterns it will encounter.

Thanks in advance for bearing with me!

Disclaimer

The Author of this posting offers the information contained within this posting without consideration and with the reader's understanding that there's no implied or expressed suitability or fitness for any purpose. Information provided is for informational purposes only and should not be construed as rendering professional advice of any kind. Usage of this posting's information is solely at reader's own risk.

Liability Disclaimer

In no event shall Author be liable for any damages whatsoever (including, without limitation, damages for loss of use, data or profit) arising out of the use or inability to use the posting's information even if Author has been advised of the possibility of such damage.

Posting

I wasn't thinking specifically about 3750-X architecture; just trying to clarify blocking vs. non-blocking architectures.

The important point is fabric bandwidth, that's meets or exceeds all port bandwidths doesn't necessarily also mean the fabric architecture is non-blocking.

I was hoping to clarify blocking by using head-of-line blocking as an example, which used to be very common in less expensive switch architectures.  (NB: I don't believe any of the 3560/3750s have an egress head-of-line blocking issue.)

A real-world head-of-line blocking example would be, on the road, there's a vehicle immediately ahead of you waiting for on coming traffic to pass by because it wants to make a left turn, however the traffic lane ahead of that vehicle is clear.  You're head-of-line blocked by this vehicle.  Increasing the road's "bandwidth" from 25 MPH to 50 MPH would not mitigate this issue however a road "architecture" that had a left-turn lane, would avoid this problem.