I've been studying the "Inside Cisco IOS Software Architecture (CCIE Professional Development)" documentation for a better understanding of how a router deals with incoming packets and just as I thought I was getting to grips with it, I hit upon a stumbling block. I have searched high and low for a definitive answer which is clear and consice but not found anything yet.
My understanding is that when a packet is detected on the physical medium, the Interface media controller plays in the packet into its onboard Rx FIFO. At some point and not necessarily after the whole packet has been received, the Interface media controller looks at the next available RX-ring descriptor to establish the location of a free private interface packet buffer which the Interface Media Controller owns. Once found, the Rx FIFO is emptied and the packet is placed in the private interface packet buffer through Direct Memory Access (DMA). At this point the ownership of the private interface packet buffer (now filled with the packet) transfers to the main processor. I understand that at this point an attempt is made to replenish the RX-ring with another descriptor pointing to another private interface packet buffer from the private interface buffer pool. If one is not found, RX-ring descriptor will point to a free Public System buffer matching the MTU of the recieving interface.
So far, so good I hope!!!!!!!!!!
It's the next stage that throws me.....The Cisco documemtation keeps referring back to the Public Systems Buffers and how a request is made for a small buffer, middle buffer, big buffer etc....that satisfies the size of the packet needing to be processed.
From what I can read into, the packet held in the private interface packet buffer must be copied to a Public System buffer before the processor can process switch it.
My questions are:
Q1: Is this true - must the packet held in the private interface packet buffer be copied to a Public System buffer before the processor can process switch it? If so then why - is it because the processor does not have access to private interface packet buffers?
Q2: If Q1 is true then does that mean there will be 2 copies of the packet - one in the Private interface packet buffer and one in a Public System buffer? If so then why? Why not free up the Private interface packet buffer?
Q3: Where is the request for a specific Public System Buffer generated from?
Q4: Do packets held in Private Interface buffers need to be copied into Public System Buffers before Fast Switching can take place? If so, again why?
Q5: In Process Switching, documentation refers to incoming packets being placed in the Input Queue which has a configurable depth. ie the number of packets stored in the Queue. My question is: - Is this a queue that simply points to the Public Sytem Buffers - one after another, or is it a Queue that contains more copies of the original packets?
I'm most probably missing the point when it comes to understanding this complex subject but if anyone could help me I would really appreciate it.