04-28-2006 12:02 AM - edited 03-03-2019 02:59 AM
Guys,
Please could someone explain to me if all NATting is done in software and this means it is by default "processed switched"
ie
packet header re-write is done in s/w and thus has to interrupt the CPU = processed swicthed
Is that the correct way of putting it?
Also, if NAT could be done in h/w, this would mean that the CPU would not be interupted, as it would be done by an ASIC and thus the term hardware NAT?
Also, can anyone tell me what platforms support h/w NATting.
I can see the 6500 with sup32 does
Does the 73xx platform?
Many thx indeed, and if anyone has any related tech-notes on this, could they please post?
Many thx,
Ken
Solved! Go to Solution.
04-28-2006 11:27 AM
packet header re-write is done in s/w and thus has to interrupt the CPU = processed swicthed
Is that the correct way of putting it?
>> yes, that would be a correct way of putting it.
Also, if NAT could be done in h/w, this would mean that the CPU would not be interupted, as it would be done by an ASIC and thus the term hardware NAT?
Also, can anyone tell me what platforms support h/w NATting.
I can see the 6500 with sup32 does
Does the 73xx platform? not sure
>> Sup720 with PFC3a or above will do HW NAT/PAT.
Please rate helpful posts.
04-28-2006 11:27 AM
packet header re-write is done in s/w and thus has to interrupt the CPU = processed swicthed
Is that the correct way of putting it?
>> yes, that would be a correct way of putting it.
Also, if NAT could be done in h/w, this would mean that the CPU would not be interupted, as it would be done by an ASIC and thus the term hardware NAT?
Also, can anyone tell me what platforms support h/w NATting.
I can see the 6500 with sup32 does
Does the 73xx platform? not sure
>> Sup720 with PFC3a or above will do HW NAT/PAT.
Please rate helpful posts.
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