I am receiving slip errors on both E1 controllers despite following the recommended configuration steps found @ cisco.com. I have tried switching the line primary command from one controller to the other and setting one clock source to internal but i am still receiving errors. I suspect that this is causing voice problems on my network. Any help would be appreciated.
The current configuration i have is below
network-clock-participate wic 0
controller E1 0/0/0
clock source line primary
channel-group 0 timeslots 1-31
controller E1 0/0/1
pri-group timeslots 1-16
2811#sh controller e1
E1 0/0/0 is up.
Applique type is Channelized E1 - balanced
No alarms detected.
alarm-trigger is not set
Version info Firmware: 20060926, FPGA: 13, spm_count = 0
Framing is CRC4, Line Code is HDB3, Clock Source is Line Primary.
CRC Threshold is 320. Reported from firmware is 320.
Data in current interval (255 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
9 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
Thanks I managed to get it sorted in the meantime. I added network-clock-select 1 E1 0/0/1 and then changed the clock source for controller e1 0/0/1 to internal and it seems to be clean for the last 10 minutes. Many thanks you were certainly on the right track.
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