Hello Mflettre,
no it does not mean that packets will be process switched when entering the 6148 linecard.
Actually, this linecard has no connection to the Sup720 720 Gbps switching fabric, but it uses the shared bus that is the legacy interconnection between modules.
The shared bus should be capable of 32 Gbps ( in total) but the speed of single linecard access to bus is 8 Gbps.
see the C6500 architecture white paper for a more detailed explanation
http://www.cisco.com/en/US/prod/collateral/switches/ps5718/ps708/prod_white_paper0900aecd80673385.html
What you need to mind of are the limitations on the C6148 linecard itself that probably has one ASIC every 8 ports with 1GBps shared among 8 ports.
So the linecard is not capable of wire speed on all the ports (if I remember correctly or are 6 ports mapped to a single ASIC that then is connected to the shared bus internally)
Also it is important to note how do you perform the test?
Do you use netperf, iperf or similar?
Is the baseline made using two servers in the same Vlan?
if so you see differences between a simple L2 switched scenario and inter vlan routing.But it should be acceptable.
Hope to help
Giuseppe