Hi, I am trying to find clear documentation as to the architecture of the Catalyst 3560 series. I am interested in knowing about the number of ASICs and other details. Do you know where I can obtain this information from?
Hi, Thank you for the link, however the material does not quite offer what I was looking for. To be more specific I am looking for technical details of the ASICs per port, the bandwidth on the switch fabric to the backplane etc. Engineering level specifications.
Question We run asr9001 with XR 6.1.3, and we have a very long delay to
login w/ SSH 1 or 2 to the device compare to IOS device. After
investigation, the there is 1s delay between the client KEXDH_INIT and
the server (XR) KEXDH_REPLY. After debug ssh serv...
Introduction The purpose of this document is to demonstrate the Open
Shortest Path First (OSPF) behavior when the V-bit (Virtual-link bit) is
present in a non-backbone area. The V-bit is signaled in Type-1 LSA only
if the router is the endpoint of one or ...
Hi, I am seeing quite a few issues with patch install and wanted to
share my experience and workaround to this. Login to admin via CLI, then
access root with the “shell” command Issue “df –h” and you’ll probably
see the following directory full or nearly ...