dCEF stands for distributed CEF and means an architecture where route processor build and mantains CEF table and propagate it to intelligent linecards that don't need to consult the central CEF table to forward traffic.
DFC is an hardware piece, it is a submodule daughter card that can be installed on some C6500/7600 linecards to achieve dCEF on them.
DFC hosts memory chips to store the whole CEF table and connections to switching fabric.
DFCs exist in different versions if you have a sup 720 3BXL optimal performance is achieved with DFC3 BXL.
To be noted if the DFC fails the whole linecard is powered down by the chassi we had a case yesterday.
the chassis can host two RPs/SPs but only one is active (the other can be standby hot with SSO redundancy strategy).
And the MSFC builds the CEF table that is hosted in the PFC (we could call it master copy).
The computation is made centrally because all signalling messages like routing protocol messages, STP messages, CDP and other L2 messages are sent to main cpu for processing even if received on physical ports that are on intelligent linecards.
this happens also on other distributed CEF capable platforms like gsr or crs
We have ton of internal information on the subject. I suggest you do a CEC search on '6500 VoD Bootcamp'. First hit from the search is the internal 6500 wiki where there are useful VoDs on the subject.
This customer facing URL will also help you understand the 6500 architecture.
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