Cisco Support Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Announcements
You may experience some slow load times, errors, and slight inconsistencies. We ask for your patience as we finalize the launch. Thank you.

Welcome to Cisco Support Community. We would love to have your feedback.

For an introduction to the new site, click here. If you'd prefer to explore, try our test area to get started. And see here for current known issues.

New Member

How do I fix Eobc errors?

Recently received a problem ticket indicating a threshold violation on Eobc 0/0. This is occurring on a 6509 with software 12.2(33)SXI8. When doing a 'show eobc" I see the following:

Interface information:
Interface EOBC0/0 (idb = 0x50AD5524)
Hardware is Mistral EOBC (revision 5)
Address is 0000.1500.0000 (bia 0000.1500.0000)
Encap size         = 14         hardware status  = 0x210840
IDB type           = 18         IDB state        = 4
Encap type         = 0x1        Span encap size  = 0
Error threshold    = 5000       Error count      = 0
 
Counters:
rxring             = 0x921D940  rx ring entries       = 512       
rx_head            = 248        rx_tail               = 0
inputs             = 7041590557 rx_cumbytes           = 2685550134617
hw inputs          = 0          hw rx_cumbytes        = 0
rx rate (bits/sec) = 629000     rx rate (packets/sec) = 216
rx_buf_unavail     = 0          rx input drops        = 299       
input broadcast    = 25         input resource        = 1531956409
input error        = 0          input giants          = 0
input crc          = 299        rx illegal length     = 0
rxr eobc shadow    = 0x50BE2C20 txr eobc shadow       = 0x47B3DC00
 
txring             = 0x921F980  tx ring entries       = 0x200
tx_head            = 52         tx_tail               = 52
outputs            = 6628559346 tx_cumbytes           = 559065790427
hw outputs         = 0          hw tx_cumbytes        = 0
tx rate (bits/sec) = 130000     tx rate (packets/sec) = 207
tx_retry_error     = 471        tx_retry_count        = 17642354
tx_process_stopped = 96         tx total drops        = 0
 
Mistral Registers
soft_reset_cfg     = 0x040000   dma_buffer_size_reg   = 0x000000
int_mask_hi        = 0x00007E   int_mask_lo           = 0xE7001A58
rxdscp_cnt         = 512        txdscp_cnt            = 0
rxwork_dscp        = 0xE8C0     txwork_dscp           = 0xFB20
mistral_eobc_ds    = 0x47A30278 mistral_dma_register  = 0x30000000
mistral_glbl_reg   = 0x10020000
 
Misc. Global Registers:
global_cfg         = 0x20       mis_init_sts          = 0xF
        dimm_parm_cfg_hi   = 0x00000576 dimm_parm_cfg_lo      = 0x42040F5A
tm_init_size_cfg   = 0x8000

 

The counters are not registering at this time. What does this mean and how to I resolve this? Can you clear the eobc counters? Thanks!!

Regards, Mark
  • LAN Switching and Routing
1 REPLY
Cisco Employee

Hey!As we know, EOBC is a bus

Hey!

As we know, EOBC is a bus-based Ethernet. In a shared-medium bus like EOBC, we expect to see some type of errors, such as CRC errors, sometimes.  As long as the number of errors does not increase very quickly in a short period of time, we do not need to be concerned. There is no impact on the operation of the router when we observe a CRC errors because the protocols on the EOBC have a retry mechanism.

When several keep-alives are missed, it means communication is lost between the Application-Specific Integrated Circuits (ASICs) and the supervisor. In order to prevent this, the code contains a workaround that resets the EOBC when it sees that the messages do not increment constantly.

EOBC is a half-duplex out of band channel which is used for backplane communication between SP/RP and line cards. These errors are mostly benign, as deferred implies packet is ready but the media to send it on is busy. The reason for this is that the EOBC is a half-duplex interface, and the fact that there are deferred simply means that we are receiving when we attempt to transmit. With a half-duplex interface we cannot do that, so we defer the packet, and wait. Likewise, on a half-duplex interface collisions happen, and are part of normal operation.

Kind regards,

- Ed.

102
Views
5
Helpful
1
Replies