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New Member

interface flapping with unkown reason

Hi 

 

I have 2 core switches.One access switch connected to both core switches .Suddenly  both uplink to core 1 and core 2 flaps (mean interface go up and down) in access swtich

 

i have checked logs on both core and access swtich but it just interface up and down.All interface stats are fine 

Core-A:

Jun 17 10:12:28.394: %LINEPROTO-5-UPDOWN: Line protocol on Interface GigabitEthe
rnet2/1, changed state to down
Jun 17 10:12:28.410: %LINK-3-UPDOWN: Interface GigabitEthernet2/1, changed state
 to down
Jun 17 10:12:28.410: %LINEPROTO-SP-5-UPDOWN: Line protocol on Interface GigabitE
thernet2/1, changed state to down
Jun 17 10:12:28.922: %LINK-3-UPDOWN: Interface GigabitEthernet2/1, changed state
 to up
Jun 17 10:12:28.410: %LINK-SP-3-UPDOWN: Interface GigabitEthernet2/1, changed st
ate to down
Jun 17 10:12:28.918: %LINK-SP-3-UPDOWN: Interface GigabitEthernet2/1, changed st
ate to up
Jun 17 10:12:31.914: %SVCLC-5-FWTRUNK: Firewalled VLANs configured on trunks
Jun 17 10:12:31.926: %LINEPROTO-5-UPDOWN: Line protocol on Interface GigabitEthe
rnet2/1, changed state to up
Jun 17 10:12:31.932: %LINEPROTO-SP-5-UPDOWN: Line protocol on Interface GigabitE
thernet2/1, changed state to up
Jun 17 10:24:52.130: %LINK-3-UPDOWN: Interface GigabitEthernet1/13, changed stat
e to down
Jun 17 10:24:53.114: %LINEPROTO-5-UPDOWN: Line protocol on Interface GigabitEthe
rnet1/13, changed state to down
Jun 17 10:24:52.146: %LINK-SP-3-UPDOWN: Interface GigabitEthernet1/13, changed s
tate to down
Jun 17 10:24:53.122: %LINEPROTO-SP-5-UPDOWN: Line protocol on Interface GigabitE
thernet1/13, changed state to down
Jun 17 10:24:54.726: %LINK-3-UPDOWN: Interface GigabitEthernet1/13, changed stat
e to up

 

 

Core-B:

Jun 17 10:12:28.424: %LINEPROTO-5-UPDOWN: Line protocol on Interface GigabitEthe
rnet2/1, changed state to down
Jun 17 10:12:28.440: %LINK-3-UPDOWN: Interface GigabitEthernet2/1, changed state
 to down
Jun 17 10:12:28.447: %LINEPROTO-SP-5-UPDOWN: Line protocol on Interface GigabitE
thernet2/1, changed state to down
Jun 17 10:12:28.952: %LINK-3-UPDOWN: Interface GigabitEthernet2/1, changed state
 to up
Jun 17 10:12:28.447: %LINK-SP-3-UPDOWN: Interface GigabitEthernet2/1, changed st
ate to down
Jun 17 10:12:28.959: %LINK-SP-3-UPDOWN: Interface GigabitEthernet2/1, changed st
ate to up
Jun 17 10:12:30.016: %LINK-3-UPDOWN: Interface GigabitEthernet1/13, changed stat
e to down
Jun 17 10:12:30.015: %LINK-SP-3-UPDOWN: Interface GigabitEthernet1/13, changed s
tate to down
Jun 17 10:12:31.004: %LINEPROTO-5-UPDOWN: Line protocol on Interface GigabitEthe
rnet1/13, changed state to down
Jun 17 10:12:31.940: %SVCLC-5-FWTRUNK: Firewalled VLANs configured on trunks
Jun 17 10:12:31.952: %LINEPROTO-5-UPDOWN: Line protocol on Interface GigabitEthe
rnet2/1, changed state to up
Jun 17 10:12:31.000: %LINEPROTO-SP-5-UPDOWN: Line protocol on Interface GigabitE
thernet1/13, changed state to down
Jun 17 10:12:31.952: %LINEPROTO-SP-5-UPDOWN: Line protocol on Interface GigabitE
thernet2/1, changed state to up
Jun 17 10:12:32.616: %LINK-3-UPDOWN: Interface GigabitEthernet1/13, changed stat
e to up

 

 

show version of core A


------------------ show version ------------------

Cisco IOS Software, s72033_rp Software (s72033_rp-IPSERVICESK9-M), Version 12.2(33)SXI12, RELEASE SOFTWARE (fc2)
Technical Support: http://www.cisco.com/techsupport
Copyright (c) 1986-2013 by Cisco Systems, Inc.
Compiled Fri 30-Aug-13 16:07 by prod_rel_team

ROM: System Bootstrap, Version 12.2(17r)S2, RELEASE SOFTWARE (fc1)

 LM-IT-CORE-A uptime is 16 weeks, 4 days, 7 hours, 11 minutes
Uptime for this control processor is 16 weeks, 4 days, 7 hours, 8 minutes
Time since LM-IT-CORE-A switched to active is 16 weeks, 4 days, 7 hours, 8 minutes
System returned to ROM by  power cycle at 07:42:52 UAE Fri Feb 21 2014 (SP by power on)
System restarted at 07:45:07 UAE Fri Feb 21 2014
System image file is "disk1:s72033-ipservicesk9-mz.122-33.SXI12.bin"
Last reload reason: Reload Command

 

This product contains cryptographic features and is subject to United
States and local country laws governing import, export, transfer and
use. Delivery of Cisco cryptographic products does not imply
third-party authority to import, export, distribute or use encryption.
Importers, exporters, distributors and users are responsible for
compliance with U.S. and local country laws. By using this product you
agree to comply with applicable laws and regulations. If you are unable
to comply with U.S. and local laws, return this product immediately.

A summary of U.S. laws governing Cisco cryptographic products may be found at:
http://www.cisco.com/wwl/export/crypto/tool/stqrg.html

If you require further assistance please contact us by sending email to
export@cisco.com.

cisco WS-C6509-E (R7000) processor (revision 1.2) with 458720K/65536K bytes of memory.
Processor board ID SMC0947003E
SR71000 CPU at 600Mhz, Implementation 0x504, Rev 1.2, 512KB L2 Cache
Last reset from power-on
83 Virtual Ethernet interfaces
48 FastEthernet interfaces
224 Gigabit Ethernet interfaces
1917K bytes of non-volatile configuration memory.
8192K bytes of packet buffer memory.

65536K bytes of Flash internal SIMM (Sector size 512K).
Configuration register is 0x2102

 

show version of  core B


Cisco IOS Software, s72033_rp Software (s72033_rp-IPSERVICESK9-M), Version 12.2(33)SXI12, RELEASE SOFTWARE (fc2)
Technical Support: http://www.cisco.com/techsupport
Copyright (c) 1986-2013 by Cisco Systems, Inc.
Compiled Fri 30-Aug-13 16:07 by prod_rel_team

ROM: System Bootstrap, Version 12.2(17r)S2, RELEASE SOFTWARE (fc1)

 LMG-IT-CORE-B uptime is 16 weeks, 4 days, 7 hours, 29 minutes
Uptime for this control processor is 16 weeks, 4 days, 7 hours, 24 minutes
Time since LMG-IT-CORE-B switched to active is 16 weeks, 4 days, 7 hours, 24 minutes
System returned to ROM by reload at 07:28:15 UAE Fri Feb 21 2014 (SP by reload)
System restarted at 07:30:47 UAE Fri Feb 21 2014
System image file is "disk1:s72033-ipservicesk9-mz.122-33.SXI12.bin"
Last reload reason: Reload Command

 

This product contains cryptographic features and is subject to United
States and local country laws governing import, export, transfer and
use. Delivery of Cisco cryptographic products does not imply
third-party authority to import, export, distribute or use encryption.
Importers, exporters, distributors and users are responsible for
compliance with U.S. and local country laws. By using this product you
agree to comply with applicable laws and regulations. If you are unable
to comply with U.S. and local laws, return this product immediately.

A summary of U.S. laws governing Cisco cryptographic products may be found at:
http://www.cisco.com/wwl/export/crypto/tool/stqrg.html

If you require further assistance please contact us by sending email to
export@cisco.com.

cisco WS-C6509-E (R7000) processor (revision 1.2) with 458720K/65536K bytes of memory.
Processor board ID SMC0947004N
SR71000 CPU at 600Mhz, Implementation 0x504, Rev 1.2, 512KB L2 Cache
Last reset from power-on
81 Virtual Ethernet interfaces
48 FastEthernet interfaces
224 Gigabit Ethernet interfaces
1917K bytes of non-volatile configuration memory.
8192K bytes of packet buffer memory.

65536K bytes of Flash internal SIMM (Sector size 512K).
Configuration register is 0x2102

 

show version of access switch

 

2:08:43.168 GST Wed Jun 25 2014

------------------ show version ------------------

Cisco IOS Software, C3750 Software (C3750-IPBASE-M), Version 12.2(25)SEB4, RELEASE SOFTWARE (fc1)
Copyright (c) 1986-2005 by Cisco Systems, Inc.
Compiled Tue 30-Aug-05 15:47 by yenanh

ROM: Bootstrap program is C3750 boot loader
BOOTLDR: C3750 Boot Loader (C3750-HBOOT-M) Version 12.2(25r)SEC, RELEASE SOFTWARE (fc4)

 LMG-IT-MDF uptime is 2 years, 6 weeks, 1 day, 23 hours, 25 minutes
System returned to ROM by power-on
System restarted at 12:39:22 GST Sat May 12 2012
System image file is "flash:c3750-ipbase-mz.122-25.SEB4/c3750-ipbase-mz.122-25.SEB4.bin"

cisco WS-C3750-48P (PowerPC405) processor (revision J0) with 118784K/12280K bytes of memory.
Processor board ID CAT0952N129
Last reset from power-on
3 Virtual Ethernet interfaces
144 FastEthernet interfaces
36 Gigabit Ethernet interfaces
The password-recovery mechanism is enabled.

512K bytes of flash-simulated non-volatile configuration memory.
Base ethernet MAC Address       : 00:16:9D:F0:49:00
Motherboard assembly number     : 73-9675-09
Power supply part number        : 341-0029-04
Motherboard serial number       : CAT09520BGJ
Power supply serial number      : LIT095001YW
Model revision number           : J0
Motherboard revision number     : A0
Model number                    : WS-C3750-48PS-S
System serial number            : CAT0952N129
SFP Module assembly part number : 73-7757-03
SFP Module revision Number      : A0
SFP Module serial number        : CAT09511E2Z
Top Assembly Part Number        : 800-25858-03
Top Assembly Revision Number    : D0
Version ID                      : V05
CLEI Code Number                : COM1W00ARB
Hardware Board Revision Number  : 0x01


Switch   Ports  Model              SW Version              SW Image            
------   -----  -----              ----------              ----------          
*    1   52     WS-C3750-48P       12.2(25)SEB4            C3750-IPBASE-M      
     2   52     WS-C3750-48TS      12.2(25)SEB4            C3750-IPBASE-M      
     3   52     WS-C3750-48TS      12.2(25)SEB4            C3750-IPBASE-M      
     4   24     WS-C3750G-24T      12.2(25)SEB4            C3750-IPBASE-M      

 

 

 

 

4 REPLIES

Dear Asim,What are the ports

Dear Asim,

What are the ports on your access switch leading to the core swithces?

Are they all from the same member in the stack?

Also what about cpu utilization on these switches?

 

Regards,

Madhu

 

 

 

New Member

 Below are the ports On

 

Below are the ports 

On access swtich

 Gig 3/0/3 connected to  core 1

 Gig 1/0/1  connected to core 2

 

On core 1 ports is g 2/1

On Core 2 ports is g2/1

 

CPU is fine.interface stats fine no crc error nothing.But i don't why these port flaps

 

New Member

Can you port the port configs

Can you port the port configs for the switches?

 Dear Asim,How these switches

 

Dear Asim,

How these switches are connected? Are they connected directly or via patchpanel?

Please provide the below outputs from access switches

 

sh run int <both uplinks>

sh int <both ports>

sh int <> counters errors

 

Also share the same from core switches also.

 

Regards,

M

 

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