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CCIP home Lab ?? router & IOS ???

william2u
Level 1
Level 1

HI guyz, i got 2x 2501, 1x 2522, 1x 2621, 1x 3620... wat IOS needed or any other router need for CCIP home lab??? my router all with max flash & dram.....

Please advice..

Thnks,

5 Replies 5

joyride_us
Level 1
Level 1

Hi,

if you are trying to build an MPLS network, this should not suffice : minimal model for PE is 3640 and for P : 7200 !

QOS & BGP is suffient rite ???

3620 doesn't support MPLS???

Thanks for the reply ...

*By the way, can some1 let me know wat is the IOS suit CCIP ?

For example :

example : c2500-jk8os-l.12.2-1d.bin (16/16)

Thanks

Just check whether you have MPLS/Tag-switching commands available.

But this site mentions that minimal router model for PE is a 3640!

What do you mean which IOS :there is no lab exam!

HTH

the IOS is for my home lab...

25xx series with 12.2T or a 12.3 IP Plus or Enterprise/Enterprise Basic build, can support QOS ??

ft
Level 1
Level 1

ftp://ftp-eng.cisco.com/rraszuk/specials/

These are MPLS images for the 2500 compiled by Robert Raszuk, who works in

IOS engineering at Cisco. But they are not officially supported, and are a

little flakey!

2621/3620

try

12.2.15T17 Enterprise Basic

c2600-j1s3-mz.122-15.T17.bin

c3620-j1s3-mz.122-15.T17.bin

or

12.3.18 Enterprise Basic

c2600-j1s3-mz.123-18.bin

c3620-j1s3-mz.123-18.bin

or

12.3.18 Telco Feature

c2600-telco-mz.123-18.bin

R5(config)#interface fa0/1

R5(config-if)#mpls ?

ip Configure dynamic MPLS forwarding for IP

label Label properties

ldp Configure Label Distribution Protocol (LDP) parameters

mtu Set tag switching Maximum Transmission Unit

netflow Configure Egress Netflow Accounting

traffic-eng Configure Traffic Engineering parameters

R5(config-if)#mpls ip

R5(config-if)#mpls label protocol ?

both Use LDP or TDP (Adapt to peer on multiaccess interface)

ldp Use LDP

tdp Use TDP (default)

R5#show ver

Cisco Internetwork Operating System Software

IOS (tm) C2600 Software (C2600-J1S3-M), Version 12.2(13)T16, RELEASE SOFTWARE (fc1)

Technical Support: http://www.cisco.com/techsupport

Copyright (c) 1986-2005 by cisco Systems, Inc.

Compiled Thu 14-Apr-05 22:31 by yiyan

Image text-base: 0x8000809C, data-base: 0x819FC938

ROM: System Bootstrap, Version 12.2(10r)1, RELEASE SOFTWARE (fc1)

ROM: C2600 Software (C2600-J1S3-M), Version 12.2(13)T16, RELEASE SOFTWARE (fc1)

R5 uptime is 6 days, 13 hours, 44 minutes

System returned to ROM by reload

System image file is "flash:c2600-j1s3-mz.122-13.T16"

cisco 2621 (MPC860) processor (revision 0x101) with 59392K/6144K bytes of memory.

Processor board ID JAD050408JT (3626368929)

M860 processor: part number 0, mask 49

Bridging software.

X.25 software, Version 3.0.0.

SuperLAT software (copyright 1990 by Meridian Technology Corp).

TN3270 Emulation software.

2 FastEthernet/IEEE 802.3 interface(s)

2 Serial(sync/async) network interface(s)

32K bytes of non-volatile configuration memory.

16384K bytes of processor board System flash (Read/Write)

Configuration register is 0x2102

fr#show ver

Cisco Internetwork Operating System Software

IOS (tm) 3600 Software (C3620-J1S3-M), Version 12.2(13)T16, RELEASE SOFTWARE (fc1)

Technical Support: http://www.cisco.com/techsupport

Copyright (c) 1986-2005 by cisco Systems, Inc.

Compiled Thu 14-Apr-05 22:31 by yiyan

Image text-base: 0x6000891C, data-base: 0x619D4000

ROM: System Bootstrap, Version 11.1(20)AA2, EARLY DEPLOYMENT RELEASE SOFTWARE (fc1)

ROM: 3600 Software (C3620-I-M), Version 11.2(26)P, RELEASE SOFTWARE (fc1)

fr uptime is 6 weeks, 4 days, 4 hours, 25 minutes

System returned to ROM by power-on

System image file is "flash:c3620-j1s3-mz.122-13.T16.bin"

cisco 3620 (R4700) processor (revision 0x81) with 61440K/4096K bytes of memory.

Processor board ID 13832986

R4700 CPU at 80Mhz, Implementation 33, Rev 1.0

Bridging software.

X.25 software, Version 3.0.0.

TN3270 Emulation software.

16 Low-speed serial(sync/async) network interface(s)

DRAM configuration is 32 bits wide with parity disabled.

29K bytes of non-volatile configuration memory.

24576K bytes of processor board System flash (Read/Write)

Configuration register is 0x2102