INTER_VLAN#sh int g49
GigabitEthernet49 is up, line protocol is up
Hardware is xpif_port, address is 0007.50fe.2507 (bia 0007.50fe.2507)
MTU 1500 bytes, BW 1000000 Kbit, DLY 10 usec, rely 248/255, load 1/255
Encapsulation ARPA, loopback not set, keepalive set (10 sec)
Full-duplex, 1000Mb/s, 1000Base-SX, Force link-up
ARP type: ARPA, ARP Timeout 04:00:00
Last input 00:00:00, output 00:00:00, output hang never
Last clearing of "show interface" counters never
Queueing strategy: fifo
Output queue 0/40, 0 drops; input queue 0/75, 0 drops
5 minute input rate 670000 bits/sec, 151 packets/sec
5 minute output rate 653000 bits/sec, 111 packets/sec
119959192 packets input, 3850534723 bytes, 0 no buffer
Received 0 broadcasts, 0 runts, 0 giants, 0 throttles
0 input errors, 0 CRC, 0 frame, 0 overrun, 0 ignored, 0 abort
0 watchdog, 135346242 multicast
0 input packets with dribble condition detected
90488747 packets output, 1604713883 bytes, 0 underruns
0 1-collision pkt cntrs, 0 more-collision pkt cntrs,
0 excessive-collision pkt cntrs
79290942 output errors, 0 collisions, 0 interface resets
0 babbles, 0 late collision, 0 deferred
0 lost carrier, 0 no carrier
0 output buffer failures, 0 output buffers swapped out
INTER_VLAN#sh controllers gigabitEthernet 49
IF Name: GigabitEthernet49
Port Status UP
GBIC : Enabled
Internal Reset Trigger Count : 0
Slicer registers
SMDR 0xFF78 SSTR 0x1202 SSMR 0x4102 EVER 0x3002
SIMR 0x0000 MBXM 0xF000
SPER0 0xF000 SPER1 0xF000 SPER2 0xF000 SPER3 0xF000
SPER4 0xF000 SPER5 0xF000 SPER6 0xF000 SPER7 0xF000
MBXW0 0x0034 MBXW1 0x0034 MBXW2 0x0034 MBXW3 0x0034
MBXR0 0x0006 MBXR1 0x0006 MBXR2 0x0006 MBXR3 0x0006
MAC registers:
GCR: 0x4 GICR: 0x407 GMAC Status: 0x7 GBIC Status: 0xFE
MII registers of External GMAC:
Control Register (0x00): 0x140
Status Register (0x01): 0x14D
Auto Neg. Advt. Register (0x04): 0x1A0
Auto Neg. Partner Ability Reg (0x05): 0x0
TR_IPG_TIME Register (0x10): 0x7
PAUSE_TIME Register (0x11): 0x100
PAUSE_SA1 Register (0x13): 0x0
PAUSE_SA2 Register (0x14): 0x0
PAUSE_SA3 Register (0x15): 0x0
Pause Upper Threshold Reg. (0x19): 0xC00
Pause Lower Threshold Reg. (0x1A): 0x1000
TX Full Threshold Register (0x1B): 0x40
Memory Address Register (0x1C): 0xC006
Sync Status Register (0x1D): 0x40
Sys Status Register (0x1E): 0x7
Sys Control Register (0x1F): 0x3FDA
Auto Neg Ctrl Register (0xC004): 0x8008
Tx Phy Addr Register-GMAC (0xC005): 0x4FF
Rx Uinfo Registerter-GMAC (0xC006): 0xFF
Counters :
MR1 4123987649 MR2 0 MR3 66636001 MR4 19740879 MR5 7228754
MR6 7239820 MR7 19453016 MR8 95738 MR9 15431247 MR10 0
MR11 0 MR12 0 MR13 0 MR14 135825455 MR15 0
MR16 0 MR17 0 MR18 0 MR19 0 MR20 0
MR21 0
SR1 3075449862 SR2 172471375 SR3 0 SR4 0 SR5 0
MT1 1754265941 MT2 0 MT3 62593963 MT4 8142216 MT5 4818835
MT6 8116091 MT7 7146678 MT8 69320 MT9 79324386
ST1 0 ST2 0
MRXS 262238 MTXS 94 SRXS 4 STXS 0
