Cisco Support Community
Showing results for 
Search instead for 
Did you mean: 

Welcome to Cisco Support Community. We would love to have your feedback.

For an introduction to the new site, click here. And see here for current known issues.

New Member

TLB entries on C7200

There are some invalid entries. Any problem is related to it and will it cause system crash?

------------------ show c7200 ------------------

Network IO Interrupt Throttling:

throttle count=0, timer count=0

active=0, configured=0

netint usec=4000, netint mask usec=200

C7200 Midplane EEPROM:

Hardware revision 1.3 Board revision M0

Serial number 7627512 Part number 73-1539-03

Test history 0x0 RMA number 00-00-00

MAC=0010.0d6a.8800, MAC Size=1024

EEPROM format version 1, Model=0x6

EEPROM contents (hex):

0x20: 01 06 01 03 00 74 62 F8 49 06 03 03 00 10 0D 6A

0x30: 88 00 04 00 00 00 00 00 4B 89 14 B0 AA AA 00 FF


Hardware revision 2.0 Board revision D0

Serial number 7519119 Part number 73-2441-02

Test history 0x0 RMA number 00-00-00

EEPROM format version 1

EEPROM contents (hex):

0x20: 01 69 02 00 00 72 BB 8F 49 09 89 02 00 00 00 00

0x30: 68 00 00 00 98 01 29 00 FF FF FF FF FF FF FF FF

TLB entries (43/48 used):

Virt Address range Phy Address range Attributes

0x4B000000:0x4B1FFFFF 0x14B000000:0x14B1FFFFF CacheMode=2, RW, Valid

0x4B200000:0x4B3FFFFF 0x14B200000:0x14B3FFFFF CacheMode=2, RW, Valid

0x10000000:0x10001FFF 0x100000000:0x100001FFF CacheMode=2, RW, Valid

0x40000000:0x41FFFFFF 0x040000000:0x041FFFFFF CacheMode=2, RW, Valid

0x44000000:0x45FFFFFF 0x044000000:0x045FFFFFF CacheMode=2, RW, Valid

0x3C000000:0x3C7FFFFF 0x048000000:0x0487FFFFF CacheMode=2, RW, Valid

0x3C800000:0x3CFFFFFF 0x048800000:0x048FFFFFF CacheMode=2, RW, Valid

0x3D000000:0x3D7FFFFF 0x04D000000:0x04D7FFFFF CacheMode=2, RW, Valid

0x3D800000:0x3DFFFFFF 0x049000000:0x0497FFFFF CacheMode=2, RW, Valid

0x3E000000:0x3E7FFFFF 0x04D800000:0x04DFFFFFF CacheMode=2, RW, Invalid

0x3E800000:0x3EFFFFFF 0x049800000:0x049FFFFFF CacheMode=2, RW, Invalid

0x3F000000:0x3F7FFFFF 0x04E000000:0x04E7FFFFF CacheMode=2, RW, Invalid

0x1FC00000:0x1FC7FFFF 0x01FC00000:0x01FC7FFFF CacheMode=2, RO, Valid

0x1E000000:0x1E1FFFFF 0x01E000000:0x01E1FFFFF CacheMode=2, RW, Valid

0x1E800000:0x1E9FFFFF 0x01E800000:0x01E9FFFFF CacheMode=2, RW, Valid

0x60000000:0x607FFFFF 0x000000000:0x0007FFFFF CacheMode=3, RO, Valid

0x60800000:0x60FFFFFF 0x000800000:0x000FFFFFF CacheMode=3, RO, Valid

0x61000000:0x611FFFFF 0x001000000:0x0011FFFFF CacheMode=3, RO, Valid

0x61200000:0x6127FFFF 0x001200000:0x00127FFFF CacheMode=3, RO, Valid

0x61280000:0x612FFFFF 0x001280000:0x0012FFFFF CacheMode=3, RO, Valid

0x61300000:0x6131FFFF 0x001300000:0x00131FFFF CacheMode=3, RO, Valid

0x61320000:0x6133FFFF 0x001320000:0x00133FFFF CacheMode=3, RO, Valid

0x61340000:0x6135FFFF 0x001340000:0x00135FFFF CacheMode=3, RO, Valid

0x61360000:0x61361FFF 0x001360000:0x001361FFF CacheMode=3, RO, Valid

0x61362000:0x61363FFF 0x001362000:0x001363FFF CacheMode=3, RO, Valid

0x61364000:0x61365FFF 0x001364000:0x001365FFF CacheMode=3, RW, Valid

0x61366000:0x61367FFF 0x001366000:0x001367FFF CacheMode=3, RW, Valid

0x61368000:0x6136FFFF 0x001368000:0x00136FFFF CacheMode=3, RW, Valid

0x61370000:0x61377FFF 0x001370000:0x001377FFF CacheMode=3, RW, Valid

0x61378000:0x6137FFFF 0x001378000:0x00137FFFF CacheMode=3, RW, Valid

0x61380000:0x613FFFFF 0x001380000:0x0013FFFFF CacheMode=3, RW, Valid

0x61400000:0x615FFFFF 0x001400000:0x0015FFFFF CacheMode=3, RW, Valid

0x61600000:0x617FFFFF 0x001600000:0x0017FFFFF CacheMode=3, RW, Valid

0x61800000:0x61FFFFFF 0x001800000:0x001FFFFFF CacheMode=3, RW, Valid

0x62000000:0x63FFFFFF 0x002000000:0x003FFFFFF CacheMode=3, RW, Valid

0x64000000:0x65FFFFFF 0x004000000:0x005FFFFFF CacheMode=3, RW, Valid

0x66000000:0x67FFFFFF 0x006000000:0x007FFFFFF CacheMode=3, RW, Valid

0x07000000:0x077FFFFF 0x007000000:0x0077FFFFF CacheMode=2, RW, Valid

0x07800000:0x07FFFFFF 0x007800000:0x007FFFFFF CacheMode=2, RW, Valid

0x37000000:0x377FFFFF 0x207000000:0x2077FFFFF CacheMode=0, RW, Valid

0x37800000:0x37FFFFFF 0x207800000:0x207FFFFFF CacheMode=0, RW, Valid

0x7B000000:0x7B1FFFFF 0x34B000000:0x34B1FFFFF CacheMode=0, RW, Valid

0x7B200000:0x7B3FFFFF 0x34B200000:0x34B3FFFFF CacheMode=0, RW, Valid

System was restarted by power-on at 19:53:47 HK Wed Jun 19 2002


Re: TLB entries on C7200

Have you removed or deleted interfaces from this router? This can / could cause this invalid state to occur. This should not cause your router to crash.

The IRSP uses an R4600 Orion RISC processor as its CPU. The R4X00 family of RISC processors provides a full-featured memory management unit (MMU)

which uses an on-chip Translation Lookaside Buffer (TLB) to translate virtual addresses into physical addresses. The TLB is a fully associative memory that holds 48 entries, which provide mapping to 48 odd/even page pairs (96 pages).

Hope this helps,


New Member

Re: TLB entries on C7200

Don, Thanks a lot.


CreatePlease to create content