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E1

pls. interpret or give me informative links for this ...what are the difference bet the two.....thanks

E1 0/0/0 is up.

Applique type is Channelized E1 - balanced

Description: DOD to International with PRI link

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20071009, FPGA: 20, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (73 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

25 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

25 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 0 Path Code Violations,

36151 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

36151 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Sec

E1 0/0/1 is up.

Applique type is Channelized E1 - balanced

Description: DID for 3777-8700 - 3777-8999

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20071009, FPGA: 20, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (102 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

7 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

7 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

26 Line Code Violations, 4101 Path Code Violations,

291 Slip Secs, 0 Fr Loss Secs, 1 Line Err Secs, 0 Degraded Mins,

292 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 82398 Unavail Sec

s

4 REPLIES
New Member

Re: E1

Whats your config with the D channel of the Serial port and the E1 controller?

I assume your pointing to the Slip Seconds and Errored Seconds problem?

E1

Mat.

Korbenda11as simply wants to know what does means each parameter. Otherwise when E1 is up normally or not.

Can you help her?

Regards,

Claudio from Chile

Hall of Fame Super Silver

E1

Controllers are up which validates L1 is good, next thing would be to validate D channel status on the PRI circuit by issuing "sh isdn status" and ensuring multiple_frames_established is seen.

As to slips, errors, etc that is usually caused by clocking issues, cabling probelms or misconfiguration of isdn switch type for example.

HTH,

Chris

E1

Thank Chris, your answer is very good!!

Claudio

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