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Bronze

E1 R2 issue

Has anyone seen this before? Some channels go into Blocked state and no calls can be made in or out. The only solution is to reboot the router. Cisco is saying Telco switch is sending E_DSP_SIG_1100 signal which causes E1 channels to go into Blocked state. This happens at random.

controller E1 0/0/1

framing NO-CRC4

line-termination 75-ohm

ds0-group 1 timeslots 1-15 type r2-digital r2-compelled ani

cas-custom 1

country telmex

category 2

answer-signal group-b 1

groupa-callerid-end

8 REPLIES

Re: E1 R2 issue

Hi,

I have seen this happening on Cisco 5300 with the early 12.2 IOSes. It was described as a bug.

Could you post some output from the CAS (R2 line signalling) debug.

Bronze

Re: E1 R2 issue

I've spoke to another cisco engineer to get second opinion and he confirmed Telco is sending funky commands that causes channels to go into blocked state.

Here is the sample of the debug vpm signal. On May 5 at 2:02 AM it channel 14 went into blocked state.

*May 4 20:00:36.569 CDT: //3689/657A098BA80C/HPI/[]/hpi_dspmgr_close:

*May 4 20:00:36.569 CDT: //-1/xxxxxxxxxxxx/HPI/[]/hpi_dspmgr_close_cleanup:

*May 4 20:00:36.569 CDT: //3689/657A098BA80C/DSM:(50/0/10):-1/dsmp_dsmapi_reserve_resource_cb: .

*May 4 20:00:36.569 CDT: //3689/657A098BA80C/VTSP:(50/0/10):-1:-1:-1/vtsp_dsm_closed_cb:

*May 4 20:00:36.569 CDT: //3689/657A098BA80C/VTSP:(50/0/10):-1:-1:-1/vtsp_process_event:

[state:S_CLOSE_DSPRM, event:E_VTSP_DSM_CLOSE_COMPLETE]

*May 4 20:00:36.569 CDT: //3689/657A098BA80C/VTSP:(50/0/10):-1:-1:-1/act_terminate:

*May 4 20:00:36.569 CDT: //3689/657A098BA80C/VTSP:(50/0/10):-1:-1:-1/vtsp_timer_stop:

Timer Stop Time=78851360

*May 4 20:00:36.569 CDT: //-1/657A098BA80C/VTSP:(50/0/10):-1:-1:-1/vtsp_free_cdb:

CDB=0x47D21930

*May 5 02:05:23.904 CDT: htsp_process_event: [0/0/1:1(14), R2_Q421_IDLE, E_DSP_SIG_1100]

*May 5 02:05:23.904 CDT: r2_q421_blocked(0/0/1:1(14)) Rx BLOCKED

*May 5 02:05:23.904 CDT: htsp_timer_stop

*May 5 02:05:23.904 CDT: r2_reg_channel_disconnected(0/0/1:1(14))

*May 5 02:05:23.904 CDT: htsp_process_event: [0/0/1:1(15), R2_Q421_IDLE, E_DSP_SIG_1100]

*May 5 02:05:23.904 CDT: r2_q421_blocked(0/0/1:1(15)) Rx BLOCKED

*May 5 02:05:23.904 CDT: htsp_timer_stop

*May 5 02:05:23.904 CDT: r2_reg_channel_disconnected(0/0/1:1(15))

*May 5 02:05:23.904 CDT: htsp_process_event: [0/0/1:1(14), R2_Q421_BLOCKED, E_DSP_SIG_1100]

*May 5 02:05:23.904 CDT: htsp_process_event: [0/0/1:1(15), R2_Q421_BLOCKED, E_DSP_SIG_1100]

*May 5 02:05:23.904 CDT: r2_reg_process_event: [0/0/1:1(14), R2_REG_IDLE, E_R2_REG_DISCONNECT(89)]

*May 5 02:05:23.904 CDT: r2_reg_disconnect_idle(0/0/1:1(14))

*May 5 02:05:23.904 CDT: R2 Incoming Voice(0/1): DSX (E1 0/0/1:13): STATE: R2_IN_IDLE R2 Got Event R2_STOP

*May 5 02:05:23.904 CDT: r2_reg_timer_stop(0/0/1:1(14))

*May 5 02:05:23.904 CDT: r2_reg_process_event: [0/0/1:1(15), R2_REG_IDLE, E_R2_REG_DISCONNECT(89)]

*May 5 02:05:23.904 CDT: r2_reg_disconnect_idle(0/0/1:1(15))

*May 5 02:05:23.904 CDT: R2 Incoming Voice(0/1): DSX (E1 0/0/1:14): STATE: R2_IN_IDLE R2 Got Event R2_STOP

*May 5 02:05:23.904 CDT: r2_reg_timer_stop(0/0/1:1(15))

New Member

Re: E1 R2 issue

Hi,

I am also facing the blocked state on my E1 lines what did u do to solve this issue

Thanks

Hall of Fame Super Gold

Re: E1 R2 issue

Which exact IOS are you running and what is the output of "show controllers E1" ?

New Member

Re: E1 R2 issue

show version | in Version

Cisco IOS Software, 2800 Software (C2800NM-IPVOICEK9-M), Version 12.4(11)XJ4, RELEASE SOFTWARE (fc2)

ROM: System Bootstrap, Version 12.4(13r)T, RELEASE SOFTWARE (fc1)

and

show controllers E1

E1 0/0/0 is up.

Applique type is Channelized E1 - balanced

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20060711, FPGA: 13, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line Primary.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (869 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 0 Path Code Violations,

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

E1 0/0/1 is up.

Applique type is Channelized E1 - balanced

No alarms detected.

alarm-trigger is not set

Version info Firmware: 20060711, FPGA: 13, spm_count = 0

Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

CRC Threshold is 320. Reported from firmware is 320.

Data in current interval (870 seconds elapsed):

0 Line Code Violations, 0 Path Code Violations

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Total Data (last 24 hours)

0 Line Code Violations, 0 Path Code Violations,

0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 1 Unavail Secs

Hall of Fame Super Gold

Re: E1 R2 issue

Hi, when channels are blocked, if you do shut/no shut under controller E1, do they unblock ?

New Member

Re: E1 R2 issue

yes they do unblock and after a while they become block.

Hall of Fame Super Gold

Re: E1 R2 issue

Hi, you should keep debug vpm signal enable until the channels become blocked, to investigate why.

Alternatively try changing IOS, eg 12.4(3j)

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