I think shaping rate on dlci must be a little bit lower than the speed on the main serial interface. If you clock S0 only with 64k shaping and QoS on s0.1 works fine, but you run in a bottleneck on S0 (long delay/drops) caused by additional FR-overhead.
With XR 4.2.0 the ASR9000 is releasing a new line of hardware models. This amongst others is the RSP440, the next generation RSP with faster switch fabric along with Typhoon based Linecards, the next generation network processor.
The Cisco EPN system incorporates a network architecture designed to consolidate multiples services on a single Multiprotocol Label Switching (MPLS) transport network. This network is designed primarily based on...
Internet security is important with the increasing attacks that are happening every day. Many internet and browsing security solutions exist, but some are not very easy to use or maybe the question is how can I enable them?