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New Member

Multilink & two Serial connections for MPLS WAN

Hello,

I have a MPLS site that has 2811 router with a Multilink setup

interface Multilink1

bandwidth 4098

ip address 10.19.191.65 255.255.255.252

ppp multilink

ppp multilink links minimum 1

ppp multilink group 1

max-reserved-bandwidth 100

service-policy output EGRESS_QUEUING_TO_ATT

interface Serial0/0/0:0

bandwidth 2048

no ip address

no ip redirects

no ip unreachables

no ip proxy-arp

encapsulation ppp

ppp multilink

ppp multilink group 1

max-reserved-bandwidth 100

!

interface Serial0/1/0:0

bandwidth 2048

no ip address

no ip redirects

no ip unreachables

no ip proxy-arp

encapsulation ppp

ppp multilink

ppp multilink group 1

max-reserved-bandwidth 100

interface FastEthernet0/0

description MPLS Connection to Vandalia

ip address 10.19.40.1 255.255.255.248

duplex auto

speed auto

standby 1 timers 3 6

standby 1 priority 105

standby 1 preempt

standby 1 track Serial0/0/0:0

service-policy output EGRESS_QUEUING_TO_LAN

Serial0/0/0:0              unassigned      YES NVRAM  up                    down   

Serial0/1/0:0              unassigned      YES NVRAM  up                    up    

interface Multilink1

bandwidth 4098

ip address 10.19.191.65 255.255.255.252

ppp multilink

ppp multilink links minimum 1

ppp multilink group 1

max-reserved-bandwidth 100

service-policy output EGRESS_QUEUING_TO_ATT

Two Serial connections

interface Serial0/0/0:0
bandwidth 2048
no ip address
no ip redirects
no ip unreachables
no ip proxy-arp
encapsulation ppp
ppp multilink
ppp multilink group 1
max-reserved-bandwidth 100
!
interface Serial0/1/0:0
bandwidth 2048
no ip address
no ip redirects
no ip unreachables
no ip proxy-arp
encapsulation ppp
ppp multilink
ppp multilink group 1
max-reserved-bandwidth 100

...and this on the router's ethernet port

interface FastEthernet0/0
description MPLS Connection to site ABC
ip address 10.19.40.1 255.255.255.248
duplex auto
speed auto
standby 1 timers 3 6
standby 1 priority 105
standby 1 preempt
standby 1 track Serial0/0/0:0
service-policy output EGRESS_QUEUING_TO_LAN

Only one Serial is up

Serial0/0/0:0              unassigned      YES NVRAM  up                    down   
Serial0/1/0:0              unassigned      YES NVRAM  up                    up     

It appears as if the Serial0/0/0:0 is in standby mode.

Question, can I remove the Standby 1 section of FE0/0 to bring up the second serial connection without dropping the live Serial0/1/0:0?

Thanks

  • WAN Routing and Switching
1 ACCEPTED SOLUTION

Accepted Solutions
Cisco Employee

Multilink & two Serial connections for MPLS WAN

Hi Mark,

No obvious clues in any of the output you've kindly provided. I am sorry - this seems this is up to a new support call to your WAN provider. Do not mention the CDPCP, though - this is your router merely trying to negotiate the use of CDP over the Multilink interface which is completely irrelevant, because even if the provider ran CDP in his network, it would not run it towards a customer. What is worth mentioning, though, is that you are sending LCP packets over the S0/0/0:0 circuit to negotiate it as a PPP link, and never get a response back.

Best regards,

Peter

16 REPLIES
Cisco Employee

Multilink & two Serial connections for MPLS WAN

Mark,

The standby section in your Fa0/0 configuration has no relation to your multilink setup. It is a configuration of an HSRP virtual router instance (though it appears to be incomplete - there is no IP address of the virtual router specified). Removing it will not cause your S0/0/0:0 to come up.

Can you post the output of the show interface s0/0/0:0 command?

Best regards,

Peter

New Member

Multilink & two Serial connections for MPLS WAN

sh int Serial0/0/0:0
Serial0/0/0:0 is up, line protocol is down
  Hardware is GT96K Serial
  MTU 1500 bytes, BW 2048 Kbit, DLY 20000 usec,
     reliability 255/255, txload 1/255, rxload 1/255
  Encapsulation PPP, LCP Listen, multilink Closed, loopback not set
  Keepalive set (10 sec)
  Last input 13w4d, output 00:00:27, output hang never
  Last clearing of "show interface" counters 00:32:50
  Input queue: 0/75/0/0 (size/max/drops/flushes); Total output drops: 0
  Queueing strategy: weighted fair
  Output queue: 0/1000/64/0 (size/max total/threshold/drops)
     Conversations  0/1/256 (active/max active/max total)
     Reserved Conversations 0/0 (allocated/max allocated)
     Available Bandwidth 2048 kilobits/sec
  5 minute input rate 0 bits/sec, 0 packets/sec
  5 minute output rate 0 bits/sec, 0 packets/sec
     0 packets input, 0 bytes, 0 no buffer
     Received 0 broadcasts, 0 runts, 0 giants, 0 throttles
     0 input errors, 0 CRC, 0 frame, 0 overrun, 0 ignored, 0 abort
     390 packets output, 12480 bytes, 0 underruns
     0 output errors, 0 collisions, 39 interface resets
     0 output buffer failures, 0 output buffers swapped out
     0 carrier transitions
  Timeslot(s) Used: UNFRAMED, SCC: 0, Transmitter delay is 0 flags
tijrtrmpls1#

Last input 13 weeks ago and I was new to this company.  No one knows if it ever worked with both links up at the same time.

Cisco Employee

Multilink & two Serial connections for MPLS WAN

Mark,

I see. In any case, the interface either is not capable of carrying PPP frames back and forth - it says "LCP Open" meaning that it is most probably not receiving LCP negotiation messages from the other side - or the opposite device over the circuit does not speak PPP.

Do you believe you could run debug ppp negotiation on your router while also having terminal monitor activated and see if there is any message related to PPP negotiation?

Also, what kind of line is this? Is it a T1 or a similar link? Can you post the configuration of the corresponding controller?

Best regards,

Peter

New Member

Multilink & two Serial connections for MPLS WAN

tijrtrmpls1#
Sep  9 08:02:18: Mu1 CDPCP: Timeout: State REQsent
Sep  9 08:02:18: Mu1 CDPCP: O CONFREQ [REQsent] id 197 len 4
Sep  9 08:02:19: Se0/0/0:0 LCP: Timeout: State REQsent
Sep  9 08:02:19: Se0/0/0:0 LCP: O CONFREQ [REQsent] id 23 len 28
Sep  9 08:02:19: Se0/0/0:0 LCP:    MagicNumber 0xA97B4836 (0x0506A97B4836)
Sep  9 08:02:19: Se0/0/0:0 LCP:    MRRU 1500 (0x110405DC)
Sep  9 08:02:19: Se0/0/0:0 LCP:    EndpointDisc 1 tijrtrmpls1 (0x130E0174696A7274726D706C7331)
Sep  9 08:02:20: Mu1 CDPCP: Timeout: State REQsent
Sep  9 08:02:20: Mu1 CDPCP: O CONFREQ [REQsent] id 198 len 4
Sep  9 08:02:21: Se0/0/0:0 LCP: Timeout: State REQsent
Sep  9 08:02:21: Se0/0/0:0 LCP: O CONFREQ [REQsent] id 24 len 28
Sep  9 08:02:21: Se0/0/0:0 LCP:    MagicNumber 0xA97B4836 (0x0506A97B4836)
Sep  9 08:02:21: Se0/0/0:0 LCP:    MRRU 1500 (0x110405DC)
Sep  9 08:02:21: Se0/0/0:0 LCP:    EndpointDisc 1 tijrtrmpls1 (0x130E0174696A7274726D706C7331)
Sep  9 08:02:22: Mu1 CDPCP: Timeout: State REQsent
Sep  9 08:02:22: Mu1 CDPCP: O CONFREQ [REQsent] id 199 len 4
Sep  9 08:02:23: Se0/0/0:0 LCP: Timeout: State REQsent
Sep  9 08:02:23: Se0/0/0:0 LCP: O CONFREQ [REQsent] id 25 len 28
Sep  9 08:02:23: Se0/0/0:0 LCP:    MagicNumber 0xA97B4836 (0x0506A97B4836)
Sep  9 08:02:23: Se0/0/0:0 LCP:    MRRU 1500 (0x110405DC)
Sep  9 08:02:23: Se0/0/0:0 LCP:    EndpointDisc 1 tijrtrmpls1 (0x130E0174696A7274726D706C7331)
Sep  9 08:02:24: Mu1 CDPCP: Timeout: State REQsent
Sep  9 08:02:24: Mu1 CDPCP: O CONFREQ [REQsent] id 200 len 4
Sep  9 08:02:25: Se0/0/0:0 LCP: Timeout: State REQsent
Sep  9 08:02:25: Se0/0/0:0 LCP: State is Listen
Sep  9 08:02:26: Mu1 CDPCP: Timeout: State REQsent
Sep  9 08:02:26: Mu1 CDPCP: State is Listen
Sep  9 08:02:55: Se0/0/0:0 LCP: Timeout: State Listen
Sep  9 08:02:55: Se0/0/0:0 LCP: O CONFREQ [Listen] id 26 len 28
Sep  9 08:02:55: Se0/0/0:0 LCP:    MagicNumber 0xA97C0C38 (0x0506A97C0C38)
Sep  9 08:02:55: Se0/0/0:0 LCP:    MRRU 1500 (0x110405DC)
Sep  9 08:02:55: Se0/0/0:0 LCP:    EndpointDisc 1 tijrtrmpls1 (0x130E0174696A7274726D706C7331)
Sep  9 08:02:56: Mu1 CDPCP: Timeout: State Listen
Sep  9 08:02:56: Mu1 CDPCP: O CONFREQ [Listen] id 201 len 4
Sep  9 08:02:57: Se0/0/0:0 LCP: Timeout: State REQsent
Sep  9 08:02:57: Se0/0/0:0 LCP: O CONFREQ [REQsent] id 27 len 28
Sep  9 08:02:57: Se0/0/0:0 LCP:    MagicNumber 0xA97C0C38 (0x0506A97C0C38)
Sep  9 08:02:57: Se0/0/0:0 LCP:    MRRU 1500 (0x110405DC)
Sep  9 08:02:57: Se0/0/0:0 LCP:    EndpointDisc 1 tijrtrmpls1 (0x130E0174696A7274726D706C7331)
Sep  9 08:02:58: Mu1 CDPCP: Timeout: State REQsent
Sep  9 08:02:58: Mu1 CDPCP: O CONFREQ [REQsent] id 202 len 4
Sep  9 08:02:59: Se0/0/0:0 LCP: Timeout: State REQsent
Sep  9 08:02:59: Se0/0/0:0 LCP: O CONFREQ [REQsent] id 28 len 28
Sep  9 08:02:59: Se0/0/0:0 LCP:    MagicNumber 0xA97C0C38 (0x0506A97C0C38)
Sep  9 08:02:59: Se0/0/0:0 LCP:    MRRU 1500 (0x110405DC)
Sep  9 08:02:59: Se0/0/0:0 LCP:    EndpointDisc 1 tijrtrmpls1 (0x130E0174696A7274726D706C7331)


tijrtrmpls1#sh controller serial0/0/0:0
Interface Serial0/0/0:0
Hardware is GT96Kidb at 0x45D74DFC, driver data structure at 0x45E09C14
wic_info 0x0
Physical Port 0, SCC Num 0
MPSC Registers:
MMCR_L=0x000304C0, MMCR_H=0x00000000, MPCR=0x00000100
CHR1=0x00FE007E, CHR2=0x00000000, CHR3=0x00000648, CHR4=0x00000000
CHR5=0x00000000, CHR6=0x00000000, CHR7=0x00000000, CHR8=0x00000000
CHR9=0x00000000, CHR10=0x00000028
SDMA Registers:
SDC=0x00002201, SDCM=0x00000080
CRDP=0x0F90FC60, CTDP=0x0F945F80, FTDB=0x0F945F80
Main Routing Register=0x77777371 BRG Conf Register=0x00480000
Rx Clk Routing Register=0x00000000 Tx Clk Routing Register=0x00000000
GPP Registers:
Conf=0x55115511, Io=0x55115511, Data=0xFFCFFFCF, Level=0x00000000
FTDM Registers:
&TCR=0xB400C008, TCR=0x8081A500
&tdpram[0]=0xB4008000, tdpram[0]=0xC00FF
&tdpram[1]=0xB4008004, tdpram[1]=0xC00FF
&tdpram[2]=0xB4008008, tdpram[2]=0xC00FF
&tdpram[3]=0xB400800C, tdpram[3]=0xC00FF
&tdpram[4]=0xB4008010, tdpram[4]=0xC00FF
&rdpram[0]=0xB4008400, rdpram[0]=0xC00FF
&rdpram[1]=0xB4008404, rdpram[1]=0xC00FF
&rdpram[2]=0xB4008408, rdpram[2]=0xC00FF
&rdpram[3]=0xB400840C, rdpram[3]=0xC00FF
&rdpram[4]=0xB4008410, rdpram[4]=0xC00FF
TDM FPGA Registers:
vmcr[0] = 0x00000003, vmcr[1] = 0x00000003,
vmcr[2] = 0x00000000, vmcr[3] = 0x00000000
ntrcr0 = 0x00000000, ntrcr1 = 0x00000000
tdmcr = 0x0000006A, labcr = 0x00000000, tpllr_cr = 0x00000000
nhr = 0x66662626, isr = 0x0000FFFF, imr = 0x00000000
110698925 input aborts on receiving flag sequence
0 throttles, 0 enables
22642984 overruns
0 transmitter underruns
0 transmitter CTS losts
530978596 rxintr, 292205499 txintr, 49 rxerr, 0 txerr
1201488001 mpsc_rx, 49 mpsc_rxerr, 37192523 mpsc_rlsc, 103210556 mpsc_rhnt, 1161268647 mpsc_rfsc
798 mpsc_rcsc, 49 mpsc_rovr, 0 mpsc_rcdl, 0 mpsc_rckg, 0 mpsc_bper
0 mpsc_txerr, 158806505 mpsc_teidl, 0 mpsc_tudr, 0 mpsc_tctsl, 0 mpsc_tckg
0 sdma_rx_sf, 104 sdma_rx_mfl, 22642984 sdma_rx_or, 110698925 sdma_rx_abr, 92699347 sdma_rx_no
0 sdma_rx_de, 0 sdma_rx_cdl, 310538552 sdma_rx_ce, 0 sdma_tx_rl, 0 sdma_tx_ur, 0 sdma_tx_ctsl
49 sdma_rx_reserr, 0 sdma_tx_reserr
0 rx_bogus_pkts, rx_bogus_flag FALSE
0 sdma_tx_ur_processed
fport 0, 0 ftdm_rint, 0 ftdm_rsl, 0 ftdm_tint, 0 ftdm_tsl

tx_limited = 1(2), errata19 count1 - 0, count2 - 0
Receive Ring
rxr head (0)(0x0F90FC60), rxr tail (0)(0x0F90FC60)
  rmd(F90FC60): nbd F90FC70 cmd_sts 80800000 buf_sz 06000000 buf_ptr F946E20
  rmd(F90FC70): nbd F90FC80 cmd_sts 80800000 buf_sz 06000000 buf_ptr F94D420
  rmd(F90FC80): nbd F90FC90 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95ACE0
  rmd(F90FC90): nbd F90FCA0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F947AE0
  rmd(F90FCA0): nbd F90FCB0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F94EDA0
  rmd(F90FCB0): nbd F90FCC0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95B340
  rmd(F90FCC0): nbd F90FCD0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F952700
  rmd(F90FCD0): nbd F90FCE0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F9599C0
  rmd(F90FCE0): nbd F90FCF0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95DFE0
  rmd(F90FCF0): nbd F90FD00 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95F300
  rmd(F90FD00): nbd F90FD10 cmd_sts 80800000 buf_sz 06000000 buf_ptr F957380
  rmd(F90FD10): nbd F90FD20 cmd_sts 80800000 buf_sz 06000000 buf_ptr F94C100
  rmd(F90FD20): nbd F90FD30 cmd_sts 80800000 buf_sz 06000000 buf_ptr F94E0E0
  rmd(F90FD30): nbd F90FD40 cmd_sts 80800000 buf_sz 06000000 buf_ptr F959360
  rmd(F90FD40): nbd F90FD50 cmd_sts 80800000 buf_sz 06000000 buf_ptr F9513E0
  rmd(F90FD50): nbd F90FD60 cmd_sts 80800000 buf_sz 06000000 buf_ptr F9546E0
  rmd(F90FD60): nbd F90FD70 cmd_sts 80800000 buf_sz 06000000 buf_ptr F94ADE0
  rmd(F90FD70): nbd F90FD80 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95E640
  rmd(F90FD80): nbd F90FD90 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95C660
  rmd(F90FD90): nbd F90FDA0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F958040
  rmd(F90FDA0): nbd F90FDB0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F9520A0
  rmd(F90FDB0): nbd F90FDC0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F94F400
  rmd(F90FDC0): nbd F90FDD0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F949AC0
  rmd(F90FDD0): nbd F90FDE0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F954D40
  rmd(F90FDE0): nbd F90FDF0 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95D980
  rmd(F90FDF0): nbd F90FE00 cmd_sts 80800000 buf_sz 06000000 buf_ptr F9467C0
  rmd(F90FE00): nbd F90FE10 cmd_sts 80800000 buf_sz 06000000 buf_ptr F949460
  rmd(F90FE10): nbd F90FE20 cmd_sts 80800000 buf_sz 06000000 buf_ptr F950720
  rmd(F90FE20): nbd F90FE30 cmd_sts 80800000 buf_sz 06000000 buf_ptr F948140
  rmd(F90FE30): nbd F90FE40 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95A020
  rmd(F90FE40): nbd F90FE50 cmd_sts 80800000 buf_sz 06000000 buf_ptr F95ECA0
  rmd(F90FE50): nbd F90FC60 cmd_sts 80800000 buf_sz 06000000 buf_ptr F953A20
Transmit Ring
txr head (9)(0x0F945FB0), txr tail (9)(0x0F945FB0)
  tmd(F945F20): nbd F945F30 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F400AD4
  tmd(F945F30): nbd F945F40 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F400494
  tmd(F945F40): nbd F945F50 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F644574
  tmd(F945F50): nbd F945F60 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F647854
  tmd(F945F60): nbd F945F70 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F647714
  tmd(F945F70): nbd F945F80 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F646954
  tmd(F945F80): nbd F945F90 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F401394
  tmd(F945F90): nbd F945FA0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F401C54
  tmd(F945FA0): nbd F945FB0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr F646A94
  tmd(F945FB0): nbd F945FC0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F945FC0): nbd F945FD0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F945FD0): nbd F945FE0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F945FE0): nbd F945FF0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F945FF0): nbd F946000 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946000): nbd F946010 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946010): nbd F946020 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946020): nbd F946030 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946030): nbd F946040 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946040): nbd F946050 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946050): nbd F946060 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946060): nbd F946070 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946070): nbd F946080 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946080): nbd F946090 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946090): nbd F9460A0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9460A0): nbd F9460B0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9460B0): nbd F9460C0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9460C0): nbd F9460D0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9460D0): nbd F9460E0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9460E0): nbd F9460F0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9460F0): nbd F946100 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946100): nbd F946110 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946110): nbd F946120 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946120): nbd F946130 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946130): nbd F946140 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946140): nbd F946150 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946150): nbd F946160 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946160): nbd F946170 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946170): nbd F946180 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946180): nbd F946190 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946190): nbd F9461A0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9461A0): nbd F9461B0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9461B0): nbd F9461C0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9461C0): nbd F9461D0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9461D0): nbd F9461E0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9461E0): nbd F9461F0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9461F0): nbd F946200 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946200): nbd F946210 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946210): nbd F946220 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946220): nbd F946230 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946230): nbd F946240 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946240): nbd F946250 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946250): nbd F946260 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946260): nbd F946270 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946270): nbd F946280 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946280): nbd F946290 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946290): nbd F9462A0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9462A0): nbd F9462B0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9462B0): nbd F9462C0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9462C0): nbd F9462D0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9462D0): nbd F9462E0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9462E0): nbd F9462F0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9462F0): nbd F946300 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946300): nbd F946310 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946310): nbd F946320 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946320): nbd F946330 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946330): nbd F946340 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946340): nbd F946350 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946350): nbd F946360 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946360): nbd F946370 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946370): nbd F946380 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946380): nbd F946390 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946390): nbd F9463A0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9463A0): nbd F9463B0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9463B0): nbd F9463C0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9463C0): nbd F9463D0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9463D0): nbd F9463E0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9463E0): nbd F9463F0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9463F0): nbd F946400 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946400): nbd F946410 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946410): nbd F946420 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946420): nbd F946430 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946430): nbd F946440 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946440): nbd F946450 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946450): nbd F946460 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946460): nbd F946470 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946470): nbd F946480 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946480): nbd F946490 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946490): nbd F9464A0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9464A0): nbd F9464B0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9464B0): nbd F9464C0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9464C0): nbd F9464D0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9464D0): nbd F9464E0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9464E0): nbd F9464F0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9464F0): nbd F946500 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946500): nbd F946510 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946510): nbd F946520 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946520): nbd F946530 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946530): nbd F946540 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946540): nbd F946550 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946550): nbd F946560 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946560): nbd F946570 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946570): nbd F946580 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946580): nbd F946590 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946590): nbd F9465A0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9465A0): nbd F9465B0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9465B0): nbd F9465C0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9465C0): nbd F9465D0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9465D0): nbd F9465E0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9465E0): nbd F9465F0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9465F0): nbd F946600 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946600): nbd F946610 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946610): nbd F946620 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946620): nbd F946630 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946630): nbd F946640 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946640): nbd F946650 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946650): nbd F946660 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946660): nbd F946670 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946670): nbd F946680 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946680): nbd F946690 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946690): nbd F9466A0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9466A0): nbd F9466B0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9466B0): nbd F9466C0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9466C0): nbd F9466D0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9466D0): nbd F9466E0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9466E0): nbd F9466F0 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F9466F0): nbd F946700 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946700): nbd F946710 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0
  tmd(F946710): nbd F945F20 cmd_sts 00C30000 byt_cnt ABCDABCD buf_ptr 0

buffer size 1524

It is an AT&T circuit up until the last mile inside of Tijuana Mexico.  The handoff is to Telnor and changes to two DSL links.

Cisco Employee

Multilink & two Serial connections for MPLS WAN

Mark,

Thank you. Is there any controller section present in your running-config that could refer to the S0/0/0:0 interface, or is there a Serial0/0/0 interface configuration (without the ":0" designator)? Can you please post that as well? It seems there is a problem in frame synchronization - the show controllers you have posted says:

110698925 input aborts on receiving flag sequence

Does this number increase, by the way?

Best regards,

Peter

New Member

Multilink & two Serial connections for MPLS WAN

Here is the controller information:

controller E1 0/0/0

line-termination 75-ohm

channel-group 0 unframed

!

controller E1 0/1/0

line-termination 75-ohm

channel-group 0 unframed

controller E1 0/0/0

line-termination 75-ohm

channel-group 0 unframed

I do not see the input aborrts on receiving flag sequence number incrementing.

Thanks

Mark

Hall of Fame Super Silver

Multilink & two Serial connections for MPLS WAN

Hello Mark,

check with the WAN provider if they are providing the expected service on all E1 links (the correct ones at least)

it looks like one member link is not exchanging CDCP LCPCP control messages so or the circuit is broken or undirectional in some way.

Also the problem might be caused within the internal SDH or over transport network of the device, This is is not an easy to troubleshoot type of issue.

Hope to help

Giuseppe

Cisco Employee

Multilink & two Serial connections for MPLS WAN

Giuseppe,

Thanks for joining! I am not that strong with T1/E1 lines so your help is definitely most welcome! I am currently trying to ask Mark to pull out as many debug and troubleshooting outputs as possible for us to see if there is any obvious thing we have overlooked. It may very well end up in calling the WAN provider, though - but before we do that, it would at least be good to know what to complain about, apart from "it does not work".

Please stay joined! Thank you!

Best regards,

Peter

Cisco Employee

Multilink & two Serial connections for MPLS WAN

Mark,

Is there a show controller e1 or show controller e1 0/0/0 available? Would you mind posting that output as well? Ideally, if the output can be gathered both for 0/0/0 and 0/1/0, can you post them both? Perhaps we can draw a conclusion based on their comparison.

Best regards,

Peter

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