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processor memory for NPE300

From the "show version" output below, would it be able to know what is the SDRAM memory combination at this 7206VXR router ?

The total main memory shown is 128MB.

From the below URL http://www.ciscotaccc.com/kaidara-advisor/core/showcase?case=K12439092

and

http://www.cisco.com/en/US/partner/products/hw/routers/ps341/products_installation_guide_chapter09186a008054ede0.html

there is 32MB fixed packet memory in bank 0. This left 96MB memory at bank 1. What can be the memory combination at bank 1 ? 1x32MB + 1x64MB ? can the memory be mixed with different size ?

------------------ show version --------

Cisco Internetwork Operating System Software

IOS (tm) 7200 Software (C7200-JK2S-M), Version 12.1(22c), RELEASE SOFTWARE (fc1)

Copyright (c) 1986-2004 by cisco Systems, Inc.

Compiled Thu 01-Apr-04 15:33 by pwade

Image text-base: 0x60008950, data-base: 0x61A04000

ROM: System Bootstrap, Version 12.0(19990210:195103) [12.0XE 105], DEVELOPMENT SOFTWARE

BOOTLDR: 7200 Software (C7200-BOOT-M), Version 12.0(10)S, EARLY DEPLOYMENT RELEASE SOFTWARE (fc1)

System image file is "slot0:c7200-jk2s-mz.121-22c.bin"

cisco 7206VXR (NPE300) processor (revision D) with 90112K/40960K bytes of memory.

Processor board ID 20395331

R7000 CPU at 262Mhz, Implementation 39, Rev 2.1, 256KB L2, 2048KB L3 Cache

6 slot VXR midplane, Version 2.0

Last reset from power-on

Channelized E1, Version 1.0.

Bridging software.

X.25 software, Version 3.0.0.

SuperLAT software (copyright 1990 by Meridian Technology Corp).

TN3270 Emulation software.

Primary Rate ISDN software, Version 1.1.

2 FastEthernet/IEEE 802.3 interface(s)

8 Serial network interface(s)

8 Channelized E1/PRI port(s)

125K bytes of non-volatile configuration memory.

20480K bytes of Flash PCMCIA card at slot 0 (Sector size 128K).

4096K bytes of Flash internal SIMM (Sector size 256K).

Configuration register is 0x2102

1 REPLY
Silver

Re: processor memory for NPE300

Bank 1 is generally user configurable.If the memory requirement for IOS is 64 MB,determine what is available Processor Memory in Bank 0 and let us assume it is 32MB In that case the combination which is mentioned( 32+64) is right.So in essence bank 1 configuration depends on the processor memory on bank 0.

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