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VWIC 2-Port T1/E1 card in 3825

trudeau02
Level 1
Level 1

Hi,

I have a CESoPSN terminated on a T1 port 0/2/1, See below for configuration.

controller T1 0/2/1

linecode b8zs

cablelength long 0db

cem-group 0 timeslots 1-24

interface CEM0/2/1

no ip address

cem 0

xconnect 10.221.221.87 100 encapsulation mpls

SYS22-Cis#show xconnect all

Legend: XC ST=Xconnect State, S1=Segment1 State, S2=Segment2 State

UP=Up, DN=Down, AD=Admin Down, IA=Inactive, NH=No Hardware

XC ST Segment 1 S1 Segment 2 S2

------+---------------------------------+--+---------------------------------+--

UP ac CE0/2/1(CESoPSN Basic) UP mpls 10.221.221.87:100 UP

For testing purposes, I wanted to put a loopback cable in the T1 port, so that traffic is looped back over MPLS to the source. However, when I create the loopback cable as shown below, the port does not go green? The document for the VWIC 2T1/E1 card, specifies that the port must use RJ-48C.

Below is my loopback cable. Is this correct?

Pinout:

PIN1: RX Ring <-------\

PIN2: RX Tip <*******|***

PIN3: Reserved | *

PIN4: TX Ring >-------/ *

PIN5: TX Tip >***********

PIN6: Reserved

PIN7: shield

PIN8: Shield

Also, the port is showing that it is UP, with no cable in it. How is this possible?

SYS22-Cis#show interfaces CE0/2/0 description

Interface Status Protocol Description

CE0/2/0 down down

SYS22-Cis#show interfaces CE0/2/1 description

Interface Status Protocol Description

CE0/2/1 up up

2 Replies 2

Giuseppe Larosa
Hall of Fame
Hall of Fame

Hello ,

your cable look like correct

see for example:

http://www.chebucto.ns.ca/Chebucto/Technical/Manuals/Max/max6000/gs/cables.htm#17238

table c-5 cross-cover cable

I think that default configuration the T1 will try to get clock from line

clock source line

You could try under controller T1 to add

clock source internal

the other fact that ce0/2/1 unplugged shows up/up makes me wonder too.

Hope to help

Giuseppe

trudeau02
Level 1
Level 1

So my loopback cable is correct. But it does not work. And I tried making changes to the timing, but that did not change the status of the port. Any other thoughts?

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