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%EM_FPGA-1-FPGA_RING_FULL

cssam
Level 1
Level 1

‎12-05-2007 01:11 AM - edited ‎03-05-2019 07:49 PM

FPGA buffer descripter is full received in 2800 routers. Output interpreter is not clear on this. There is no specific document for this error. Please suggest.

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smothuku
Level 7
Level 7

‎12-05-2007 01:33 AM

Hi ,

Better open a TAC case with cisco to resolve the issue quickly.

Thanks,

satish

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cssam
Level 1
Level 1
In response to smothuku

‎12-05-2007 02:59 AM

Hi Sathish,

Thanks for your input. I will do the same.

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